參數(shù)資料
型號: M4-128N/64-7JC
廠商: LATTICE SEMICONDUCTOR CORP
元件分類: PLD
英文描述: High Performance E 2 CMOS In-System Programmable Logic
中文描述: EE PLD, 7.5 ns, PQCC84
封裝: PLASTIC, LCC-84
文件頁數(shù): 30/46頁
文件大?。?/td> 754K
代理商: M4-128N/64-7JC
36
MACH 4 Family
44-PIN PLCC CONNECTION DIAGRAM (M4(LV)-32/32 AND M4(LV)-64/32)
Top View
44-Pin PLCC
PIN DESIGNATIONS
CLK/I = Clock or Input
GND = Ground
I/O
= Input/Output
VCC
= Supply Voltage
TDI
= Test Data In
TCK
= Test Clock
TMS
= Test Mode Select
TDO = Test Data Out
1 44 43 42
5
4
3
2
641 40
7
8
9
10
11
12
13
14
15
16
17
23 24 25 26
19 20 21 22
18
27 28
39
38
37
36
35
34
33
32
31
30
29
I/O5
I/O6
I/O7
TDI
CLK0/I0
GND
TCK
I/O8
I/O9
I/O10
I/O11
A2
A1
A0
B0
B1
B2
B3
D3
D2
D1
D0
C0
C1
C2
B3
B2
B1
B0
B8
B9
B10
A2
A1
A0
A8
A9
A10
A11
I/O27
I/O26
I/O25
I/O24
TDO
GND
CLK1/I1
TMS
I/O23
I/O22
I/O21
I/O12
I/O13
I/O14
I/O15
VCC
GND
I/O16
I/O17
I/O18
I/O19
I/O20
B4
B5
B6
B7
C7
C6
C5
C4
C3
A12
A13
A14
A15
B15
B14
B13
B12
B11
I/O4
I/O3
I/O2
I/O1
I/O0
GND
VCC
I/O31
I/O30
I/O29
I/O28
A3
A4
A5
A6
A7
D7
D6
D5
D4
A3
A4
A5
A6
A7
B7
B6
B5
B4
M4(LV)-32/32
M4(LV)-64/32
17466G-026
I/O Cell (0-7)
PAL Block (A-D)
C7
相關(guān)PDF資料
PDF描述
M4-192/96-12VC High Performance E 2 CMOS In-System Programmable Logic
M4-192/96-12VI High Performance E 2 CMOS In-System Programmable Logic
M4-32/32-12VI48 High Performance E 2 CMOS In-System Programmable Logic
M4-32/32-15JC High Performance E 2 CMOS In-System Programmable Logic
M4-32/32-15VC High Performance E 2 CMOS In-System Programmable Logic
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