參數(shù)資料
型號： M38K27M4L-XXXFP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP64
封裝： 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù)： 73/151頁
文件大?。?/td> 1403K
代理商： M38K27M4L-XXXFP
38K2 Group
Rev.3.00
Oct 15, 2006
page 28 of 147
REJ03B0193-0300
Endpoint Buffer Area Setting
The buffer area used in data transfer can be assigned to any area
of the multi-channel RAM for each endpoint.
qBuffer area beginning address
The buffer area configuration register (address 0FED16) defines
the beginning address of the buffer area (every 32 bytes) for each
Endpoint. However, the only RAM area is configurable.
00h [Address 000016], 01h [Address 002016]: Not configurable
02h [Address 004016] to 1Fh [Address 03E016]: Configurable
qInterrupt-source dependant buffer area offset address
An offset value is added to the beginning address of each source,
which is specified by the interrupt source register (address
001D16), for each endpoint.
This section describes in detail the beginning address specified by
the buffer area set register as offset address 00h, according to
each endpoint.
(1) Endpoint 00
Endpoint 00 has two kinds of interrupt sources for accessing the
buffer. The respective address offsets are:
BSRDY00 (SETUP Buffer Ready Interrupt): Offset address = 00h
BRDY00 (OUT or IN Buffer Ready Interrupt):
Offset address = 08h
(2) Endpoint 01
The buffer area offset address for each interrupt source for of End-
point 01 varies according to the contents of the EP01 set register
(address 001916).
In single buffer mode (DBLB01 = “0”):
Endpoint 01 has only one interrupt source for accessing the
buffer.
B0RDY01 (Buffer 0 Ready Interrupt): Offset address = 00h
In double buffer mode (DBLB01 = “1”):
Endpoint 01 has two kinds of interrupt sources for accessing the
buffer.
B0RDY01 (Buffer 0 Ready Interrupt): Offset address = 00h
B1RDY01 (Buffer 1 Ready Interrupt):
The offset address varies according to the double buffer begin-
ning address set bit (BSIZ01).
-Offset address = 08h when BSIZ01 = 00
-Offset address = 10h when BSIZ01 = 01
-Offset address = 40h when BSIZ01 = 10
-Offset address = 80h when BSIZ01 = 11
(3) Endpoints 02 and 03
Same as Endpoint 01.
(4) Endpoint 10
Same as Endpoint 00.
(5) Endpoint 11
Endpoint 11 has only one interrupt source for accessing the buffer.
B0RDY11 (Buffer 0 Ready Interrupt): Offset address = 00h
Notes
The selected RAM area must be within addresses 004016 to
03FF16.
Make sure the buffer area beginning address is set in agreement
with the offset address and the number of transmit/receive data
bytes.
This is particularly important when in the double buffer mode or
when handling 64-byte data.
Fig. 27 Example setting of buffer area beginning address
Fig. 28 Examples of interrupt source dependant buffer area offset address
0FED16 = 15h
000016
002016
004016
006016
02A016
03E016
Memory
SFR
RAM
00
01
02
03
15
1F
0FED16
Disabled to be used
0000
0010 1010
(a) When selecting Endpoint 00
Memory
02A016
02A816
Offset
00h
08h
BSRDY00
BRDY00
02A016
00h
B0RDY01
(d) When selecting Endpoint 11
02A016
00h
B0RDY11
02A016
032016
00h
80h
B0RDY01
B1RDY01
Memory
Offset
(b) When selecting Single Buffer Mode
Memory
Offset
(c) When selecting Double Buffer Mode
(when BSIZ01 = 11)
Memory
Offset
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