參數(shù)資料
型號: M38K27M4L-XXXFP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64
文件頁數(shù): 44/151頁
文件大?。?/td> 1403K
代理商: M38K27M4L-XXXFP
38K2 Group (L Ver.)
Rev.3.00
Oct 15, 2006
page 138 of 147
REJ03B0193-0300
Min.
Typ.
Max.
Symbol
Parameter
Limits
Unit
ta(R-D)
tv(R-D)
ta(ACK-D)
tv(ACK-D)
td(R-Mdis)
td(W-Mdis)
td(R-Men)
td(W-Men)
Data output enable time after read
Data output disable time after read
Data output enable time after ExDACK
Data output disable time after ExDACK
In cycle mode
Mch_req disable output delay time after read
In cycle mode
Mch_req disable output delay time after write
In cycle mode
Mch_req enable output delay time after read
In cycle mode
Mch_req enable output delay time after write
ns
0
Table 28 Switching characteristics of external bus interface (EXB) (1)
(VCC = 4.00 to 5.25 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
USB function not operating
USB function operating
60
80
tC(
φ)+10
tC(
φ)+10
tC(
φ)3+10
tC(
φ)5+10
tC(
φ)3+10
tC(
φ)5+10
ns
USB function not operating
USB function operating
Min.
Typ.
Max.
Symbol
Parameter
Limits
Unit
ta(R-D)
tv(R-D)
ta(ACK-D)
tv(ACK-D)
td(R-Mdis)
td(W-Mdis)
td(R-Men)
td(W-Men)
Data output enable time after read
Data output disable time after read
Data output enable time after ExDACK
Data output disable time after ExDACK
In cycle mode
Mch_req disable output delay time after read
In cycle mode
Mch_req disable output delay time after write
In cycle mode
Mch_req enable output delay time after read
In cycle mode
Mch_req enable output delay time after write
ns
0
Table 29 Switching characteristics of external bus interface (EXB) (2)
(VCC = 3.00 to 4.00 V, VSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
USB function not operating
USB function operating
80
120
tC(
φ)+30
tC(
φ)+30
tC(
φ)3+30
tC(
φ)5+30
tC(
φ)3+30
tC(
φ)5+30
ns
USB function not operating
USB function operating
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