參數(shù)資料
型號: M38C37ECMFS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, UVPROM, 4 MHz, MICROCONTROLLER, CQCC80
封裝: 0.80 MM PITCH, CERAMIC, LCC-80
文件頁數(shù): 31/65頁
文件大?。?/td> 808K
代理商: M38C37ECMFS
34
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38C3 Group
ROM correct enable register 1(address 0F01 16)
RC1
b7
b0
ROM correct address 1 enable bit
0 : Disabled
1 : Enabled
ROM correct address 2 enable bit
0 : Disabled
1 : Enabled
ROM correct address 3 enable bit
0 : Disabled
1 : Enabled
ROM correct address 4 enable bit
0 : Disabled
1 : Enabled
ROM correct address 5 enable bit
0 : Disabled
1 : Enabled
ROM correct address 6 enable bit
0 : Disabled
1 : Enabled
ROM correct address 7 enable bit
0 : Disabled
1 : Enabled
ROM correct address 8 enable bit
0 : Disabled
1 : Enabled
ROM correct data 1
ROM correct data 2
ROM correct data 3
ROM correct data 4
ROM correct data 5
ROM correct data 6
ROM correct data 7
ROM correct data 8
005016
005116
005216
005316
005416
005516
005616
005716
0F0216
0F0316
0F0416
0F0516
0F0616
0F0716
0F0816
0F0916
0F0A16
0F0B16
0F0C16
0F0D16
0F0E16
0F0F16
0F1016
0F1116
ROM correct high-order address register 1
ROM correct low-order address register 1
ROM correct high-order address register 2
ROM correct low-order address register 2
ROM correct high-order address register 3
ROM correct low-order address register 3
ROM correct high-order address register 4
ROM correct low-order address register 4
ROM correct high-order address register 5
ROM correct low-order address register 5
ROM correct high-order address register 6
ROM correct low-order address register 6
ROM correct high-order address register 7
ROM correct low-order address register 7
ROM correct high-order address register 8
ROM correct low-order address register 8
ROM CORRECTION FUNCTION
The 38C3 group has the ROM correction function correcting data at
the arbitrary addresses in the ROM area.
[ROM correct address register] 0F0216 – 0F1116
This is the register to store the address performing ROM correction.
There are two types of registers to correct up to 8 addresses: one is
the register to store the high-order address and the other is to store
the low-order address.
[ROM correct enable register (RC1)] 0F0116
This is the register to enable the ROM correction function. When set-
ting the bit corresponding to the ROM correction address to “1”, the
ROM correction function is enabled.
It becomes invalid to the addresses of which corresponding bit is “0”.
All bits are “0” at the initial state.
[ROM correct data]
This is the register to store a correct data for the address specified by
the ROM correct address register.
sNotes on ROM correction function
1. To use the ROM correction function, transfer data to each ROM
correct data register in the initial setting.
2. Do not specify the same addresses in the ROM correct address
register.
Fig. 34 Structure of ROM correct address register
Fig. 35 Structure of ROM correct data
Fig. 36 Structure of ROM correct enable register 1
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