參數(shù)資料
型號(hào)： M38C37ECMFS
元件分類： 微控制器/微處理器
英文描述： 8-BIT, UVPROM, 4 MHz, MICROCONTROLLER, CQCC80
封裝： 0.80 MM PITCH, CERAMIC, LCC-80
文件頁(yè)數(shù)： 2/65頁(yè)
文件大小： 808K
代理商： M38C37ECMFS
7
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38C3 Group
Not available
Processor mode bits
b1 b0
0
0 : Single-chip mode
0
1 :
1
0 :
1
1 :
Stack page selection bit
0 : RAM in the zero page is used as stack area
1 : RAM in page 1 is used as stack area
Not used (returns “1” when read)
(Do not write “0” to this bit.)
Port XC switch bit
0 : I/O port
1 : XCIN, XCOUT
Main clock ( XIN–XOUT) stop bit
0 : Operating
1 : Stopped
Main clock division ratio selection bit
0 : f(XIN)/2 (high-speed mode)
1 : f(XIN)/8 (middle-speed mode)
Internal system clock selection bit
0 : XIN-XOUT selected (middle-/high-speed mode)
1 : XCIN-XCOUT selected (low-speed mode)
CPU mode register
(CPUM (CM) : address 003B 16)
b7
b0
FUNCTIONAL DESCRIPTION
CENTRAL PROCESSING UNIT (CPU)
The 38C3 group uses the standard 740 family instruction set. Refer
to the table of 740 family addressing modes and machine instruc-
tions or the 740 Family Software Manual for details on the instruction
set.
Machine-resident 740 family instructions are as follows:
The FST and SLW instruction cannot be used.
The STP, WIT, MUL, and DIV instruction can be used.
[CPU Mode Register (CPUM)] 003B16
The CPU mode register contains the stack page selection bit and the
internal system clock selection bit.
The CPU mode register is allocated at address 003B16.
Fig. 5 Structure of CPU mode register
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