2-50
38C3 Group User’s Manual
APPLICATION
2.3 Serial I/O
q Control in the slave unit
After setting the relevant registers as shown in Figure 2.3.23, the slave unit becomes the state
where a synchronous clock can be received at any time, and the serial I/O interrupt occurs each
time an 8-bit synchronous clock is received.
In the serial I/O interrupt processing routine, the data to be transmitted next is written to the serial
I/O register after the received data is read out.
However, if no serial I/O interrupt occurs for a certain time (heading adjustment time or more), the
following processing will be performed.
1. The first 1-byte data of the transmission data in the block is written into the serial I/O register.
2. The data to be received next is processed as the first 1 byte of the received data in the block.
Figure 2.3.25 shows a control procedure of the slave unit using the serial I/O interrupt and any
timer interrupt (for heading adjustment).
Fig. 2.3.25 Control procedure of slave unit
Write a transmission data
Read a reception data
N
Within a block transfer
term?
Y
A received byte
counter
≥ 8?
N
RTI
Write dummy data (FF16)
A received byte counter +1
Heading
adjustment
counter
Initial
value
(Note 3)
Serial I/O reception interrupt
processing routine
Timer interrupt processing
routine
Heading adjustment
counter – 1
N
Heading adjustment
counter = 0?
Y
RTI
Write the first transmission
data (first byte) in a block
A received byte counter
0
Confirmation of the received
byte counter to judge the
block transfer term
In this example, set the value which is equal to the
heading adjustment time divided by the timer interrupt
cycle as the initial value of the heading adjustment
counter.
For example: When the heading adjustment time is 8 ms
and the timer interrupt cycle is 1 ms, set
8 as the initial value.
3:
q
CLT (Note 1)
CLD (Note 2)
Push register to stack
Pushing the register used in
the interrupt processing
routine into the stack
q
CLT (Note 1)
CLD (Note 2)
Push register to stack
Pushing the register used
in the interrupt processing
routine into the stack.
q
Pop registers
Popping registers which is
pushed to stack
q
Pop registers
Popping registers which is
pushed to stack
q
Notes 1: When using the Index X mode flag (T).
2: When using the Decimal mode flag (D).