參數(shù)資料
型號： M38C37ECMFP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, OTPROM, 4 MHz, MICROCONTROLLER, PQFP80
封裝： 14 X 20 MM, 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù)： 4/65頁
文件大?。?/td> 808K
代理商： M38C37ECMFP
9
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38C3 Group
Fig. 7 Memory map of special function register (SFR)
ROM correct high-order address register 1 (Note)
ROM correct high-order address register 2 (Note)
ROM correct high-order address register 3 (Note)
ROM correct high-order address register 4 (Note)
Port P8 output selection register (P8SEL)
002016
002116
002216
002316
002416
002516
002616
002716
002816
002916
002A16
002B16
002C16
002D16
002E16
002F16
003016
003116
003216
003316
003416
003516
003616
003716
003816
003916
003A16
003B16
003C16
003D16
003E16
003F16
000016
000116
000216
000316
000416
000516
000616
000716
000816
000916
000A16
000B16
000C16
000D16
000E16
000F16
001016
001116
001216
001316
001416
001516
001616
001716
001816
001916
001A16
001B16
001C16
001D16
001E16
001F16
Port P0 (P0)
Port P0 direction register (P0D)
Port P1 (P1)
Port P1 direction register (P1D)
Port P2 (P2)
Port P2 direction register (P2D)
Port P3 (P3)
Port P4 (P4)
Port P4 direction register (P4D)
Port P5 (P5)
Port P5 direction register (P5D)
Port P6 (P6)
Port P6 direction register (P6D)
Port P7 (P7)
Port P7 direction register (P7D)
Serial I/O control register 1 (SIOCON1)
Serial I/O control register 2 (SIOCON2)
Serial I/O register (SIO)
Interrupt control register 2 (ICON2)
Timer 6 PWM register (T6PWM)
Interrupt edge selection register (INTEDGE)
CPU mode register (CPUM)
Interrupt request register 1 (IREQ1)
Interrupt request register 2 (IREQ2)
Interrupt control register 1 (ICON1)
Timer 1 (T1)
Timer 3 (T3)
Timer 5 (T5)
Timer 6 (T6)
Timer 2 (T2)
Timer 4 (T4)
PULL register A (PULLA)
PULL register B (PULLB)
Timer 12 mode register (T12M)
Timer 34 mode register (T34M)
Timer 56 mode register (T56M)
Segment output enable register (SEG)
LCD mode register (LM)
A-D control register (ADCON)
A-D conversion register (low) (ADL)
Port P8 (P8)
Port P8 direction register (P8D)
φ output control register (CKOUT)
Timer A register (low) (TAL)
Timer A register (high) (TAH)
Compare register (low) (CONAL)
Compare register (high) (CONAH)
Timer A mode register (TAM)
Timer A control register (TACON)
A-D conversion register (high) (ADH)
0F0A16
0F0B16
0F0C16
0F0D16
0F0E16
0F0F16
0F1016
0F1116
ROM correct enable register 1 (Note)
ROM correct low-order address register 1 (Note)
ROM correct high-order address register 5 (Note)
ROM correct low-order address register 5 (Note)
ROM correct high-order address register 6 (Note)
ROM correct low-order address register 6 (Note)
ROM correct high-order address register 7 (Note)
ROM correct low-order address register 7 (Note)
ROM correct high-order address register 8 (Note)
ROM correct low-order address register 8 (Note)
0F0116
0F0216
0F0316
0F0716
0F0816
0F0916
0F0416
0F0516
0F0616
ROM correct low-order address register 2 (Note)
ROM correct low-order address register 3 (Note)
ROM correct low-order address register 4 (Note)
Note: This register is valid only in mask ROM version.
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