參數(shù)資料
型號(hào)： M38C29MC-XXXHP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 19/63頁(yè)
文件大?。?/td> 1000K
代理商： M38C29MC-XXXHP
19
38C2 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Fig. 15 Interrupt control
Fig. 16 Structure of interrupt-related registers
Interrupt request bit
Interrupt enable bit
Interrupt disable flag (I)
BRK instruction
Reset
Interrupt request
b7
b0
Interrupt edge selection register
(INTEDGE : address 003A
16
)
INT
0
interrupt edge selection bit
INT
1
interrupt edge selection bit
INT
2
interrupt edge selection bit
INT
2
/Key input interrupt switch bit
Timer Y/CNTR
1
interrupt switch bit
Not used (return
“
0
”
when read)
(Do not write to
“
1
”
)
Interrupt request register 1
(IREQ1 : address 003C
16
)
INT
0
interrupt request bit
INT
1
interrupt request bit
INT
2
interrupt request bit
Key input interrupt request bit
Serial I/O1 receive interrupt request bit
Serial I/O1 transmit interrupt request bit
Serial I/O2 receive interrupt request bit
Serial I/O2 transmit interrupt request bit
Timer X interrupt request bit
Interrupt control register 1
(ICON1 : address 003E
16
)
INT
0
interrupt enable bit
INT
1
interrupt enable bit
INT
2
interrupt enable bit
Key input interrupt enable bit
Serial I/O1 receive interrupt enable bit
Serial I/O1 transmit interrupt enable bit
Serial I/O2 receive interrupt enable bit
Serial I/O2 transmit interrupt enable bit
Timer X interrupt enable bit
0 : No interrupt request issued
1 : Interrupt request issued
Interrupt request register 2
(IREQ2 : address 003D
16
)
Timer 1 interrupt request bit
Timer 2 interrupt request bit
Timer 3 interrupt request bit
Timer 4 interrupt request bit
CNTR
0
interrupt request bit
Timer Y interrupt request bit
CNTR
1
interrupt request bit
AD conversion interrupt request bit
Not used (returns
“
0
”
when read)
Interrupt control register 2
(ICON2 : address 003F
16
)
Timer 1 interrupt enable bit
Timer 2 interrupt enable bit
Timer 3 interrupt enable bit
Timer 4 interrupt enable bit
CNTR
0
interrupt enable bit
Timer Y interrupt enable bit
CNTR
1
interrupt enable bit
AD conversion interrupt enable bit
Not used (returns
“
0
”
when read)
(Do not write to
“
1
”
.)
0 : Interrupts disabled
1 : Interrupts enabled
0 : Falling edge active
1 : Rising edge active
b7
b0
b7
b0
b7
b0
b7
b0
0 : INT
2
interrupt
1 : Key input interrupt
0 : Timer Y interrupt
1 : CNTR
1
interrupt
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