參數(shù)資料
型號(hào)： M38C24M4-XXXHP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁數(shù)： 25/63頁
文件大小： 1000K
代理商： M38C24M4-XXXHP
25
38C2 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
Fig. 21 Waveform of PWM01
16-bit Timer
G
Frequency Divider For Timer
Each timer X and timer Y have the frequency dividers for the count
source. The count source of the frequency divider is switched to X
IN
or X
CIN
by the CPU mode register. The division ratio of each timer
can be controlled by the 3-bit register. The division ratio can be se-
lected from as follows;
1/1, 1/2, 1/16, 1/32, 1/64, 1/128, 1/256, 1/1024 of f(X
IN
) or f(X
CIN
).
G
Timer X
The timer X count source can be selected by setting the timer X mode
register. When f(X
CIN
) is selected as the count source, counting can
be performed regardless of X
CIN
oscillation. However, when X
CIN
is
stopped, the external pulse input from X
CIN
pin is counted.
The timer X operates as down-count. When the timer contents reach
“
0000
16
”
, an underflow occurs at the next count pulse and the timer
latch contents are reloaded. After that, the timer continues count-
down. When the timer underflows, the interrupt request bit correspond-
ing to the timer X is set to
“
1
”
.
Six operating modes can be selected for timer X by the timer X mode
register and timer X control register.
(1) Timer Mode
The count source can be selected by setting the timer X mode regis-
ter. In this mode, timer X operates as the 18-bit counter by setting the
timer X register (extension).
(2) Pulse Output Mode
Pulses of which polarity is inverted each time the timer underflows
are output from the T
XOUT
pin. Except for that, this mode operates
just as in the timer mode.
When using this mode, set the port sharing the T
XOUT
pin to output
mode.
(3) IGBT Output Mode
After dummy output from the T
XOUT
pin, count starts with the INT
0
pin input as a trigger. In the case that the timer X output edge switch
bit is
“
0
”
, when the trigger is detected or the timer X underflows,
“
H
”
is
output from the T
XOUT
pin. When the count value corresponds with
the compare register value, the T
XOUT
output becomes
“
L
”
.
After noise is cleared by noise filters, judging continuous 4-time same
levels with sampling clocks to be signals, the INT
0
signal can use 4
types of delay time by a delay circuit.
When using this mode, set the port sharing the INT
0
pin to input
mode and set the port sharing the T
XOUT
pin to output mode.
When the timer X output control bit 1 or 2 of the timer X control reg-
ister is set to
“
1
”
, the timer X count stop bit is fixed to
“
1
”
forcibly by
the interrupt signal of INT
1
or INT
2
. And then, by stopping the timer X
counting, the T
XOUT
output can be fixed to the signal output at that
time.
Do not write
“
1
”
to the timer X register (extension) when using the
IGBT output mode.
(4) PWM Mode
IGBT dummy output, an external trigger with the INT
0
pin and output
control with pins INT
1
and INT
2
are not used. Except for those, this
mode operates just as in the IGBT output mode.
The period of PWM waveform is specified by the timer X set value. In
the case that the timer X output edge switch bit is
“
0
”
, the
“
H
”
interval
is specified by the compare register set value.
When using this mode, set the port sharing the T
XOUT
pin to output
mode.
Do not write
“
1
”
to the timer X register (extension) when using the
PWM mode.
O
u
t
p
u
t
w
a
v
e
f
o
r
m
o
f
T
i
m
e
r
3
P
W
M
0
o
r
T
i
m
e
r
4
P
W
M
1
256
t
s
256
t
s
256
t
s
256
t
s
n
t
s
n
ts
n
t
s
n
t
s
n
t
s
n
t
s
n
t
s
n
ts
n
t
s
n
t
s
P
W
M
0
1
r
e
g
i
s
t
e
r
=
“
0
0
2
”
n: Setting value of Timer 3 or Timer 4
ts: One period of Timer 3 count source or Timer 4 count source
PWM01 register (address 0024
16
) : 2-bit value corresponding to PWM0 or PWM1
(n+1)
ts
(n+1)
ts
(n+1)
ts
(n+1)
ts
(
n
+
1
)
t
s
(
n
+
1
)
t
s
P
W
M
0
1
r
e
g
i
s
t
e
r
=
“
0
1
2
”
P
W
M
0
1
r
e
g
i
s
t
e
r
=
“
1
0
2
”
P
W
M
0
1
r
e
g
i
s
t
e
r
=
“
1
1
2
”
S
h
o
r
t
i
n
t
e
r
v
a
l
Short interval
Short interval
S
o
r
t
i
n
t
e
r
v
a
l
4
256
t
s
Long interval
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