參數(shù)資料
型號: M38C24M4-XXXFP
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機
文件頁數(shù): 39/63頁
文件大?。?/td> 1000K
代理商: M38C24M4-XXXFP
39
38C2 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change.
(divider division ratio for LCD)
(frequency of count source for LCDCK)
duty ratio
f(LCDCK)
Fig. 37 LCD display RAM map
LCD Display RAM
The 12-byte area of address 0040
16
to 004B
16
is the designated
RAM for the LCD display. When
1
is written to these addresses, the
corresponding segments of the LCD display panel are turned on.
LCD Drive Timing
For the LCD drive timing, type A or type B can be selected.
The LCD drive timing is selected by the timing selection bit (bit 4 of
LCD mode register).
Type A is selected by setting the LCD drive timing selection bit to
0
,
type B is selected by setting the bit to
1
. Type A is selected after
reset.
The LCDCK timing frequency (LCD drive timing) is generated inter-
nally and the frame frequency can be determined with the following
equation;
I
Note
(1) When the STP instruction is executed, the following bits are
cleared to
0
;
LCD enable bit (bit 3 of LCD mode register)
Bits other than bit 6 of the LCD power control register.
(2) When the voltage is applied to V
L1
to V
L3
by using the external
resistor, write
10
2
to dividing resistor for LCD power selection bits
(RSEL) of the LCD power control register (address 38
16
).
C
O
M
3
C
O
M
2
C
O
M
1
C
O
M
0
Bit
Address
0040
16
0041
16
0042
16
0043
16
0044
16
0045
16
0046
16
0047
16
0048
16
0049
16
004A
16
004B
16
7
6
5
4
3
2
1
0
SEG
1
SEG
3
SEG
5
SEG
7
SEG
9
SEG
11
SEG
13
SEG
15
SEG
17
SEG
19
SEG
21
SEG
23
O
M
2
SEG
0
SEG
2
SEG
4
SEG
6
SEG
8
SEG
10
SEG
12
SEG
14
SEG
16
SEG
18
SEG
20
SEG
22
C
O
M
3
C
C
O
M
1
C
O
M
0
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