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參數(shù)資料
| 型號： | M38C13M6-XXXHP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 21/59頁 |
| 文件大?。?/td> | 955K |
| 代理商： | M38C13M6-XXXHP |
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SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
38C1 Group
28
Fig. 27 Structure of ADKEY pin selection bits
b7b0
P4 data register (Address 000816, initial value: 0016)
P4
Note; ADKEY pin is selected by port P4 data register.
The priority of ADKEY0–ADKEY3 is as follows;
ADKEY0>ADKEY1>ADKEY2>ADKEY3
ADKEY0 selection bit
0: Invalid
1: Valid
ADKEY1 selection bit
0: Invalid
1: Valid
ADKEY2 selection bit
0: Invalid
1: Valid
ADKEY3 selection bit
0: Invalid
1: Valid
P44–P47 data latch
ADKEY Control Circuit
The ADKEY function is the function for A-D conversion of the “L”
level analog input voltage input to the ADKEY pin automatically.
This function can be used also in the state of STP and WIT.
ADKEY Selection
Two or more ADKEY pins can be selected by the low-order 4 bits
of P4 data register.
If “L” level input to an ADKEY pin is detected, other bits are set to
“0” and only the corresponding ADKEY selection bit is set to “1”.
As a result, the pin with “L” level input can be recognized.
ADKEY Enable
The ADKEY function is enabled by writing “1” to the ADKEY en-
able bit. Surely, in order to enable ADKEY functin, set “1” to the
ADKEY enable bit, after selecting the ADKEY pin.
ADKEY becomes disabled automatically after the A-D conversion
end by the ADKEY function. When the ADKEY enable bit of the A-
D control register is “1”, the analog input pin selection bits become
invalid. Please do not write “0” in the AD conversion completion bit
by the program during ADKEY enabled state.
[ADKEY Control Circuit]
The pins which performs A-D conversion is selected with the rank-
ing of ADKEY0, ADKEY1, ADKEY2, and ADKEY3 when there is
an “L” level input simultaneously to two or more valid ADKEY pins.
In order to obtain a more exact conversion result, by the A-D con-
version with ADKEY, execute the following;
set the input to the ADKEY pin into a steep falling waveform,
stabilize the input voltage within 8 clock cycle (1
s at f(XIN) =
8MHz) after the input voltage is under VIL, and
maintain the input voltage until the completion of the A-D con-
version.
The threshold voltage with an actual ADKEY pin is the voltage be-
tween VIH-VIL.
In order not to make ADKEY operation perform superfluously in a
noise etc., in the state of the waiting for an input, set the voltage of
an ADKEY pin to VIH (0.9VCC) or more.
When the following operations are performed, the A-D conversion
operation cannot be guaranteed.
When the CPU mode register is operated during A-D conversion
operation,
When the AD conversion control register is operated during A-D
conversion operation,
When STP or WIT instructin is executed during A-D conversion
operation,
When the ADKEY pin selection bit is operated during A-D con-
version operation at selecting ADKEY function, and
Return operation by reset, STOP or WIT under A-D conversion
operation at selecting ADKEY function is performed.
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