參數(shù)資料
型號： M38B57MCH-P202FP
廠商： Mitsubishi Electric Corporation
英文描述： RES,Carbon Film,51Ohms,350WV,5+/-% Tol
中文描述： 單芯片8位CMOS微機
文件頁數(shù)： 7/69頁
文件大小： 1011K
代理商： M38B57MCH-P202FP
MITSUBISHI MICROCOMPUTERS
38B5 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
7
PRELIMINARY
Notice: This s not a final specification.
Some parametric imits are subject to change.
FUNCTIONAL DESCRIPTION
Central Processing Unit (CPU)
The 38B5 group uses the standard 740 family instruction set. Refer
to the table of 740 family addressing modes and machine instruc-
tions or the 740 Family Software Manual for details on the instruction
set.
Machine-resident 740 Family instructions are as follows:
The FST and SLW instructions cannot be used.
The MUL, DIV, WIT and STP instructions can be used.
Fig. 5 Structure of CPU Mode Register
[CPU Mode Register] CPUM
The CPU mode register contains the stack page selection bit and
internal system clock control bits. The CPU mode register is allo-
cated at address 003B
16
.
CPU mode register
(
CPUM (CM) : address
003B
16
)
Processor mode bits
b1 b0
0 0 : Single-chip mode
0 1
1 0
Not available
1 1
b7
b0
Stack page selection bit
0 : 0 page
1 : 1 page
Main clock (X
IN
-X
OUT
) stop bit
0 : oscillating
1 : stopped
Main clock division ratio selection bit
0 : f(X
IN
) (high-speed mode)
1 : f(X
IN
)/4 (middle-speed mode)
Internal system clock selection bit
0 : X
IN
–X
OUT
selection (middle-/high-speed mode)
1 : X
CIN
–X
COUT
selection (low-speed mode)
Port X
C
switch bit
0 : I/O port function (stop oscillating)
1 : X
CIN
-X
COUT
oscillating
function
X
COUT
drivability selection bit
0 : Low drive
1 : High drive
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