參數(shù)資料
型號(hào)： M38B49EDH-XXXXFP
廠商： Mitsubishi Electric Corporation
英文描述： KJA SERIES III
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 39/78頁(yè)
文件大小： 1214K
代理商： M38B49EDH-XXXXFP
39
38B4 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
[Serial I/O2 Control Register] SIO2CON (001D
16
)
The serial I/O2 control register contains eight control bits for serial
I/O2 functions.
[UART Control Register] UARTCON (0017
16
)
This is a 7 bit register containing four control bits, which are valid
when UART is selected, two control bits, which are valid when using
serial I/O2, and one control bit, which is always valid.
Data format of serial data receive/transfer and the output structure of
the P5
5
/TxD pin, etc. are set by this register.
[Serial I/O2 Status Register] SIO2STS (001E
16
)
The read-only serial I/O2 status register consists of seven flags (b0
to b6) which indicate the operating status of the serial I/O2 function
and various errors. Three of the flags (b4 to b6) are only valid in the
UART mode. The receive buffer full flag (b1) is cleared to “0” when
the receive buffer is read.
The error detection is performed at the same time data is transferred
from the receive shift register to the receive buffer register, and the
receive buffer full flag is set. A writing to the serial I/O2 status regis-
ter clears error flags OE, PE, FE, and SE (b3 to b6, respectively).
Writing “0” to the serial I/O2 enable bit (SIOE : b7 of the serial I/O2
control register) also clears all the status flags, including the error
flags.
All bits of the serial I/O2 status register are initialized to “0” at reset,
but if the transmit enable bit (b4) of the serial I/O2 control register
has been set to “1”, the transmit shift register shift completion flag
(b2) and the transmit buffer empty flag (b0) become “1”.
[Serial I/O2 Transmit Buffer Register/Receive
Buffer Register] TB/RB (001F
16
)
The transmit buffer and the receive buffer are located in the same
address. The transmit buffer is write-only and the receive buffer is
read-only. If a character bit length is 7 bits, the MSB of data stored in
the receive buffer is “0”.
[Baud Rate Generator] BRG (0016
16
)
The baud rate generator determines the baud rate for serial transfer.
With the 8-bit counter having a reload register, the baud rate genera-
tor divides the frequency of the count source by 1/(n+1), where n is
the value written to the baud rate generator.
Fig. 41 Structure of serial I/O2 related register
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