參數資料
型號： M38869M8A-XXXGP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機
文件頁數： 5/110頁
文件大?。?/td> 1601K
代理商： M38869M8A-XXXGP
5
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
V
CC
, V
SS
PIN DESCRIPTION
Table 1 Pin description (1)
Functions
Name
Pin
Apply voltage of 2.7 V – 5.5 V to Vcc, and 0 V to Vss.
In the flash memory version, apply voltage of 4.0 V – 5.5 V to Vcc, and 0 V to Vss
This pin controls the operation mode of the chip.
Normally connected to V
SS
.
If this pin is connected to Vcc, the internal ROM is inhibited and an external memory is accessed.
In the flash memory version, connected to V
SS.
In the EPROM version or the flash memory version, this pin functions as the V
PP
power source input pin.
Reference voltage input pin for A-D and D-A converters.
Analog power source input pin for A-D and D-A converters.
Connect to V
SS
.
Reset input pin for active “L”.
Input and output pins for the clock generating circuit.
Connect a ceramic resonator or quartz-crystal oscillator between the X
IN
and X
OUT
pins to set
the oscillation frequency.
When an external clock is used, connect the clock source to the X
IN
pin and leave the X
OUT
pin open.
8-bit CMOS I/O port.
I/O direction register allows each pin to be individually
programmed as either input or output.
When the external memory is used, these pins are used as the address bus.
CMOS compatible input level.
CMOS 3-state output structure or N-channel open-drain output structure.
8-bit CMOS I/O port.
I/O direction register allows each pin to be individually programmed as either input or output.
When the external memory is used, these pins are used as the address bus.
CMOS compatible input level.
CMOS 3-state output structure or N-channel open-drain output structure.
8-bit CMOS I/O port.
I/O direction register allows each pin to be individually programmed as either input or output.
When the external memory is used, these pins are used as the data bus.
CMOS compatible input level.
CMOS 3-state output structure.
P2
4
to P2
7
(4 bits) are enabled to output large current for LED drive (only in single-chip mode).
8-bit CMOS I/O port.
I/O direction register allows each pin to be individually
programmed as either input or output.
When the external memory is used, these pins are
used as the control bus.
CMOS compatible input level.
CMOS 3-state output structure.
These pins function as key-on wake-up and compara-
tor input.
These pins are enabled to control pull-up.
Power source
Function except a port function
Comparator reference power source
input pin
Key-on wake-up input pin
Comparator input pin
PWM output pin
Key-on wake-up input pin
Comparator input pin
Reference voltage
Analog power source
Clock input
Clock output
I/O port P0
I/O port P1
I/O port P2
V
REF
AV
SS
P3
0
/PWM
00
P3
1
/PWM
10
CNV
SS
input
CNV
SS
RESET
Reset input
X
IN
X
OUT
P0
0
/P3
REF
P0
1
–P0
7
P1
0
–P1
7
P2
0
–P2
7
I/O port P3
P3
2
–P3
7
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