67
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Read-only Mode
The microcomputer enters the read-only mode by applying V
PP
L
to the V
PP
pin. In this mode, the user can input the address of a
memory location to be read and the control signals at the timing
shown in Figure 67, and the M38869FFAHP/GP will output the
contents of the user’s specified address from data I/O pin to the
external. In this mode, the user cannot perform any operation
other than read.
Fig. 67 Read timing
Read/Write Mode
The microcomputer enters the read/write mode by applying V
PP
H
to the V
PP
pin. In this mode, the user must first input a software
command to choose the operation (e. g., read, program, or erase)
to be performed on the flash memory (this is called the first cycle),
and then input the information necessary for execution of the com-
mand (e.g, address and data) and control signals (this is called
the second cycle). When this is done, the M38869FFAHP/GP ex-
ecutes the specified operation.
Table 21 shows the software commands and the input/output in-
formation in the first and the second cycles. The input address is
latched internally at the falling edge of the WE input; software
commands and other input data are latched internally at the rising
edge of the WE input.
The following explains each software command. Refer to Figures 68
to 70 for details about the signal input/output timings.
Table 21 Software command (Parallel input/output mode)
Symbol
Read
Program
Program verify
Erase
Erase verify
Reset
Device identification
Address input
×
×
×
×
Verify address
×
×
First cycle
Data input
00
16
40
16
C0
16
20
16
A0
16
FF
16
90
16
Address input
Read address
Program address
×
×
×
×
ADI
Second cycle
Data I/O
Read data (Output)
Program data (Input)
Verify data (Output)
20
16
(Input)
Verify data (Output)
FF
16
(Input)
DDI (Output)
Note:
ADI = Device identification address : manufacturer’s code 00000
16
, device code 00001
16
DDI = Device identification data : manufacturer’s code 1C
16
, device code D0
16
X can be V
IL
or V
IH
.
Address
Valid address
t
RC
t
a(CE)
t
WRR
t
DF
t
a(OE)
t
DH
t
OLZ
Floating
Floating
t
CLZ
t
a(AD)
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
IH
V
IL
V
OH
V
OL
CE
OE
WE
Data
Dout