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參數(shù)資料
| 型號： | M38867M8A-XXXHP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80 |
| 文件頁數(shù)： | 61/113頁 |
| 文件大小： | 1871K |
| 代理商： | M38867M8A-XXXHP |
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48
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
START/STOP
condition
control register
Oscillation
frequency
f(XIN) (MHz)
Fig. 46 Address data communication format
Fig. 45 Structure of I2C START/STOP condition control register
Note: Do not set “000002” or an odd number to the START/STOP condition set bit (SSC4 to SSC0).
Table 14 Recommended set value to START/STOP condition set bits (SSC4–SSC0) for each oscillation frequency
Main clock
divide ratio
System
clock
φ
(MHz)
SCL release time
(
s)
Setup time
(
s)
Hold time
(
s)
10
8
4
2
8
2
XXX11110
XXX11010
XXX11000
XXX00100
XXX01100
XXX01010
XXX00100
3.2
s (16 cycles)
3.5
s (14 cycles)
3.25
s (13 cycles)
3.0
s (3 cycles)
3.5
s (7 cycles)
3.0
s (6 cycles)
3.0
s (3 cycles)
6.2
s (31 cycles)
6.75
s (27 cycles)
6.25
s (25 cycles)
5.0
s (5 cycles)
6.5
s (13 cycles)
5.5
s (11 cycles)
5.0
s (5 cycles)
3.0
s (15 cycles)
3.25
s (13 cycles)
3.0
s (12 cycles)
2.0
s (2 cycles)
3.0
s (6 cycles)
2.5
s (5 cycles)
2.0
s (2 cycles)
5
4
1
2
1
b7
STSP
SEL
b0
I2C START/STOP condition
control register
START/STOP condition set bit
SCL/SDA interrupt pin polarity
selection bit
0 :Falling edge active
1 :Rising edge active
SCL/SDA interrupt pin selection bit
0 :SDA valid
1 :SCL valid
START/STOP condition generating
selection bit
0 :Setup/Hold time short mode
1 :Setup/Hold time long mode
SISSIP SSC4SSC3SSC2SSC1SSC0
(S2D : address 001716)
SSlave addressR/W
ADataA
Data
A/A
P
7 bits“0”1 to 8 bits1 to 8 bits
(1) A master-transmitter transnmits data to a slave-receiver
S
Slave address R/W
ADataA
Data
A
P
7 bits“1”1 to 8 bits1 to 8 bits
(2) A master-receiver receives data from a slave-transmitter
S
Slave address
1st 7 bits
R/W
A
7 bits“0”8 bits
(3) A master-transmitter transmits data to a slave-receiver with a 10-bit address
Slave address
2nd bytes
A
DataA
Data
A/A
P
1 to 8 bits1 to 8 bits
S
Slave address
1st 7 bits
R/W
A
7 bits“0”8 bits
(4) A master-receiver receives data from a slave-transmitter with a 10-bit address
Slave address
2nd bytes
AData
A
Sr
Slave address
1st 7 bits
R/W
A
DataP
S : START condition
A : ACK bit
Sr : Restart condition
P : STOP condition
R/W : Read/Write bit
7 bits
“1”1 to 8 bits1 to 8 bits
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M38867M8-XXXHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38867M9-XXXHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38867MA-XXXHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38867MB-XXXHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38867MC-XXXHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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