參數(shù)資料
型號: M38867E8AHP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 5 MHz, MICROCONTROLLER, PQFP80
封裝: 12 X 12 MM, 0.50 MM PITCH, PLASTIC, LQFP-80
文件頁數(shù): 28/113頁
文件大?。?/td> 1871K
代理商: M38867E8AHP
18
3886 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Fig. 14 Structure of port I/O related register
Port control register 1
b7b0
Port control register 2
P00–P03 output structure selection bit
0: CMOS
1: N-channel open-drain
P04–P07 output structure selection bit
0: CMOS
1: N-channel open-drain
P10–P13 output structure selection bit
0: CMOS
1: N-channel open-drain
P14–P17 output structure selection bit
0: CMOS
1: N-channel open-drain
P30–P33 pull-up control bit
0: No pull-up
1: Pull-up
P34–P37 pull-up control bit
0: No pull-up
1: Pull-up
PWM0 enable bit
0: PWM0 output disabled
1: PWM0 output enabled
PWM1 enable bit
0: PWM1 output disabled
1: PWM1 output enabled
P4 input level selection bit (P42–P46)
0: CMOS level input
1: TTL level input
P7 input level selection bit (P70–P75)
0: CMOS level input
1: TTL level input
P4 output structure selection bit (P42, P43, P44, P46)
0: CMOS
1: N-channel open-drain
P8 function selection bit
0: Port P8/Port P8 direction register
1: Port P4 input register/Port P7 input register
INT2, INT3, INT4 interrupt switch bit
0: INT20, INT30, INT40 interrupt
1: INT21, INT31, INT41 interrupt
Timer Y count source selection bit
0: f(XIN)/16 (f(XCIN)/16 in low-speed mode)
1: f(XCIN)
Oscillation stabilizing time set after STP instruction released bit
1: No automatic set
Port output P42/P43 clear function selection bit
0: Only software clear
1: Software clear and output data bus buffer 0 reading
(system bus side)
b7b0
(PCTL1: address 002E16)
(PCTL2: address 002F16)
0: Automatic set “0116” to timer 1 and “FF16” to prescaler 12
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