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參數(shù)資料
| 型號： | M38747MCF |
| 廠商： | Mitsubishi Electric Corporation |
| 英文描述： | SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| 中文描述： | 單芯片8位CMOS微機 |
| 文件頁數(shù)： | 48/92頁 |
| 文件大?。?/td> | 1292K |
| 代理商： | M38747MCF |
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48
3874 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
G
S
RDY3
output signal
The S
RDY3
output is a transmit/receive enable signal which in-
forms the serial transfer destination that transmit/receive is ready.
In the initial status, that is, when the serial I/O initialization bit (b4)
is reset to “0”, the S
RDY3
output goes to “L” and the S
RDY3
output
goes to “H”. After transmitted data is stored in the serial I/O3 reg-
ister (address 0013
16
) and a transmit/receive operation becomes
ready, the S
RDY3
output goes to “H” and the S
RDY3
output goes to
“L”. When a transmit/receive operation is started and the transfer
clock goes to “L”, the S
RDY3
output goes to “L” and the S
RDY3
out-
put goes to “H”.
G
S
RDY3
input signal
The S
RDY3
input signal becomes valid only when the S
RDY3
input
and the S
BUSY3
output are used. The S
RDY3
input is a signal for re-
ceiving a transmit/receive ready completion signal from the serial
transfer destination.
When the internal synchronous clock is selected, input a low level
signal into the S
RDY3
input and a high level signal into the S
RDY3
input in the initial status in which the transfer is stopped.
When an “H” level signal is input into the S
RDY3
input and an “L”
level signal is input into the S
RDY3
input for a period of 1.5 cycles
or more of transfer clock, transfer clocks are output from the S
CLK3
output and a transmit/receive operation is started.
After the transmit/receive operation is started and an “L” level sig-
nal is input into the S
RDY3
input and an “H” level signal into the
S
RDY3
input, this operation cannot be immediately stopped.
After the specified number of bits are transmitted and received,
the transfer clocks from the S
CLK3
output is stopped. The hand-
shake unit of the 8-bit serial I/O and that of the automatic transfer
serial I/O are of 8 bits. That of the arbitrary bit serial I/O is the bit
number adding “1” to the set value to the transfer counter.
When the external synchronous clock is selected, the S
RDY3
input
becomes one of the triggers to output the S
BUSY3
signal.
To start a transmit/receive operation (S
BUSY3
output to “L”, S
BUSY3
output to “H”), input an “H” level signal into the S
RDY3
input and an
“L” level signal into the S
RDY3
input, and also write transmit data
into the serial I/O3 register.
Fig. 46 S
BUSY3
output operation in arbitrary bit serial I/O mode (internal synchronous clock)
Fig. 47 S
RDY3
Output Operation
Fig. 48 S
RDY3
Input Operation (internal synchronous clock)
S
CLK3
S
BUSY3
S
OUT3
Serial transfer
status flag
Automatic transfer RAM
→
Serial I/O3 register
Serial I/O3 register
→
Automatic transfer RAM
Automatic transfer
interval
Transfer
interval
Transfer
interval
S
RDY3
S
CLK3
Write to serial
I/O3 register
S
RDY3
S
CLK3
S
OUT3
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| M38747MCF-XXXFS | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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| M38747MCT | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38747MCT-XXXFS | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M38747MCT-XXXGP | 制造商:MITSUBISHI 制造商全稱:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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