參數(shù)資料
型號(hào): M38747MCF
廠商: Mitsubishi Electric Corporation
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù): 26/92頁(yè)
文件大小: 1292K
代理商: M38747MCF
26
3874 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Timing to Interrupt Request Acceptance
The cycle number of internal system clock required from occur-
rence to acceptance of an interrupt request depends on the type
of interrupt: “multiple factors/one vector” or “one factor/one vec-
tor”.
For “one factor/one vector interrupt”, the CPU starts processing
the management after interrupt acceptance at the next instruction
execution timing (rising edge of SYNC signal) immediately after
the interrupt request is generated. For “multiple factors/one vector
interrupt”, the CPU starts processing the management after inter-
rupt acceptance at the second instruction execution timing (rising
edge of SYNC signal) after the interrupt request for interrupt factor
determination is generated. In other words, “multiple factors/one
vector interrupt” required one instruction execution cycle number
(2 to 16 cycles of internal system clock) more than that of “one
factor/one vector interrupt” to begin the interrupt sequence.
Figure 18 shows the interrupt control diagram and Figure 19
shows the timing from occurrence to acceptance of
interrupt request.
For “one factor/one vector interrupt”, the interrupt request is gen-
erated at Timing (A) and the processing after acceptance begins
at Timing (B). For “multiple factors/one vector interrupt”, the inter-
rupt factor determination request is generated at Timing (C), the
interrupt request is generated at Timing (D), and the processing
after acceptance begins at Timing (E).
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