參數(shù)資料
型號(hào)： M38504E6-XXXSP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁數(shù)： 5/99頁
文件大?。?/td> 1384K
代理商： M38504E6-XXXSP
5
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3850 Group (Spec. H)
V
CC
, V
SS
Functions
Name
Pin
Apply voltage of 2.7 V
–
5.5 V to Vcc, and 0 V to Vss.
This pin controls the operation mode of the chip.
Normally connected to V
SS
.
Reset input pin for active
“
L.
”
Input and output pins for the clock generating circuit.
Connect a ceramic resonator or quartz-crystal oscillator between the X
IN
and X
OUT
pins to set
the oscillation frequency.
When an external clock is used, connect the clock source to the X
IN
pin and leave the X
OUT
pin open.
8-bit CMOS I/O port.
I/O direction register allows each pin to be individually
programmed as either input or output.
CMOS compatible input level.
CMOS 3-state output structure.
P1
0
to P1
7
(8 bits) are enabled to output large current for LED drive.
Power source
Table 1 Pin description (spec. H)
Function except a port function
Clock input
Clock output
I/O port P0
CNV
SS
input
CNV
SS
RESET
Reset input
X
IN
X
OUT
P0
0
/S
IN2
P0
1
/S
OUT2
P0
2
/S
CLK2
P0
3
/S
RDY2
P0
4
–
P0
7
I/O port P1
P1
0
–
P1
7
P2
0
/X
COUT
P2
1
/X
CIN
P2
2
P2
3
P2
4
/RxD
P2
5
/TxD
P2
6
/S
CLK
P2
7
/CNTR
0
/
S
RDY1
Serial I/O2 function pin
Sub-clock generating circuit I/O
pins (connect a resonator)
I/O port P2
I/O port P3
I/O port P4
8-bit CMOS I/O port.
I/O direction register allows each pin to be individually
programmed as either input or output.
CMOS compatible input level.
P2
0
, P2
1
, P2
4
to P2
7
: CMOS3-state output structure.
P2
2
, P2
3
: N-channel open-drain structure.
Serial I/O1 function pin
Serial I/O1 function pin/
Timer X function pin
A-D converter input pin
Timer Y function pin
Interrupt input pins
Interrupt input pin
S
CMP2
output pin
Interrupt input pin
PWM output pin
8-bit CMOS I/O port with the same function as port P0.
CMOS compatible input level.
CMOS 3-state output structure.
8-bit CMOS I/O port with the same function as port P0.
CMOS compatible input level.
CMOS 3-state output structure.
P3
0
/AN
0
–
P3
4
/AN
4
P4
0
/CNTR
1
P4
1
/INT
0
P4
2
/INT
1
P4
3
/INT
2
/S
CMP2
P4
4
/INT
3
/PWM
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