參數(shù)資料
型號(hào): M38275EAMXXXFS
廠商: Mitsubishi Electric Corporation
英文描述: Dual Low-Power Rail-to-Rail Input/Output Op Amp w/Shutdown 10-MSOP-PowerPAD 0 to 70
中文描述: 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù): 19/70頁(yè)
文件大?。?/td> 1112K
代理商: M38275EAMXXXFS
19
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
3827 Group
Fig. 14 Interrupt control
Fig. 15 Structure of interrupt-related registers
b7
b0
Interrupt edge selection register
(INTEDGE : address 003A
16
)
INT
0
interrupt edge selection bit
INT
1
interrupt edge selection bit
INT
2
interrupt edge selection bit
INT
3
interrupt edge selection bit
Not used (return “0” when read)
Interrupt request register 1
(IREQ1 : address 003C
16
)
INT
0
interrupt request bit
INT
1
interrupt request bit
Serial I/O1 receive interrupt request bit
Serial I/O1 transmit interrupt request bit
Timer X interrupt request bit
Timer Y interrupt request bit
Timer 2 interrupt request bit
Timer 3 interrupt request bit
Interrupt control register 1
(ICON1 : address 003E
16
)
INT
0
interrupt enable bit
INT
1
interrupt enable bit
Serial I/O receive interrupt enable bit
Serial I/O transmit interrupt enable bit
Timer X interrupt enable bit
Timer Y interrupt enable bit
Timer 2 interrupt enable bit
Timer 3 interrupt enable bit
0 : No interrupt request issued
1 : Interrupt request issued
Interrupt request register 2
(IREQ2 : address 003D
16
)
CNTR
0
interrupt request bit
CNTR
1
interrupt request bit
Timer 1 interrupt request bit
INT
2
interrupt request bit
Serial I/O2 interrupt request bit
Key input interrupt request bit
ADT/AD conversion interrupt request bit
Not used (returns “0” when read)
Interrupt control register 2
(ICON2 : address 003F
16
)
CNTR
0
interrupt enable bit
CNTR
1
interrupt enable bit
Timer 1 interrupt enable bit
INT
2
interrupt enable bit
Serial I/O2 interrupt enable bit
Key input interrupt enable bit
ADT/AD conversion interrupt enable bit
Not used (returns “0” when read)
(Do not write “1” to this bit.)
0 : Interrupts disabled
1 : Interrupts enabled
0 : Falling edge active
1 : Rising edge active
b7
b0
b7
b0
b7
b0
b7
b0
Interrupt request bit
Interrupt enable bit
Interrupt disable flag (I)
BRK instruction
Reset
Interrupt request
相關(guān)PDF資料
PDF描述
M38275EAMXXXGP Dual Low-Power Rail-to-Rail Input/Output Op Amp w/Shutdown 14-SOIC 0 to 70
M38275EAMXXXHP Dual Low-Power Rail-to-Rail Input/Output Op Amp w/Shutdown 14-SOIC 0 to 70
M38275EBMXXXFS SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M38275EBMXXXGP SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M38275EBMXXXHP Dual Low-Power Rail-to-Rail Input/Output Op Amp w/Shutdown 10-MSOP-PowerPAD -40 to 125
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