
Rev.2.00
May. 24, 2006
page 16 of 90
REJ03B0028-0200
3826 Group (A version)
PWM output
DA2 output
CTCSS output
A/D external trigger input
DA1 output
DTMF input
Diagram No.
Related SFRs
Input/Output
Name
Pin
Non-Port Function
I/O Format
Table 6 List of I/O port function (1)
P00/SEG26–
P07/SEG33
P10/SEG34–
P15/SEG39
P16 , P17
P20–P27
P30/SEG18–
P37/SEG25
P40
P41/INT1,
P42/INT2
P43/
φ/TOUT
P44/RXD,
P45/TXD,
P46/SCLK1,
P47/SRDY1
P50/PWM0,
P51/PWM1
P52/RTP0,
P53/RTP1
P54/CNTR0
P55/CNTR1
P56/DA1
P57/ADT/
DA2
Port P0
Port P1
Port P2
Port P3
Port P4
Port P5
Input/output,
byte unit
Input/output,
6-bit unit
Input/output,
individual bits
Input/output,
individual bits
Output
Input/output,
individual bits
Input/output,
individual bits
CMOS compatible
input level
CMOS 3-state output
CMOS compatible
input level
CMOS 3-state output
CMOS compatible
input level
CMOS 3-state output
CMOS compatible
input level
CMOS 3-state output
CMOS compatible
input level
N-channel open-drain
output
CMOS compatible
input level
CMOS 3-state output
CMOS compatible
input level
CMOS 3-state output
LCD segment output
Key input (key-on
wake-up) interrupt
input
LCD segment output
INTi interrupt input
Timer 2 output
System clock
φ output
Serial I/O1 I/O
Real time port output
Timer X I/O
Timer Y input
PULL register A
Segment output enable
register
PULL register A
Segment output enable
register
PULL register A
Interrupt control register 2
Key input control register
Segment output enable
register
Interrupt edge selection
register
PULL register B
Timer 123 mode register
TOUT/
φ output control
register
PULL register B
Serial I/O1 control register
Serial I/O1 status register
UART control register
PULL register B
PWM control register
PULL register B
Timer X mode register
PULL register B
Timer X mode register
PULL register B
Timer Y mode register
PULL register B
DA control register
PULL register B
DA control register
AD control register
(1)
(2)
(1)
(2)
(4)
(3)
(13)
(4)
(12)
(5)
(6)
(7)
(8)
(10)
(9)
(11)
(14)
(15)
Port P3 output control
register