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3. APPENDIX
MITSUBISHI MICROCOMPUTER
3819 Group
3.1 Notes on use
3819 Group USER’S MANUAL
3.1 Notes on use
3.1.1 Notes on Interrupts
<Note 1>
For the products able to switch the external interrupt
detection edge, switch it as the following sequence.
Reason
The interrupt circuit recognizes the switching of the
detection edge as the change of external input signals.
This may cause an unnecessary interrupt.
<Note 2>
Fix the bit 7 of the interrupt control register 2 to “0”.
Figure 3.1.1 shows the structure of the interrupt control
register 2.
Clear an interrupt enable bit to “0” (interrupt disabled)
Switch the detection edge
Clear an interrupt request bit to “0” (no interrupt requ-
est issued)
NOP (one or more instructions)
Set the interrupt enable bit to “1” ( interrupt enabled )
Fig. 3.1.1 Structure of interrupt control register 2
3.1.2 Notes on the FLD controller and the serial I/O automatic transfer function
When using the FLD controller function and the serial I/O automatic transfer function, set the system clock to the high-
speed mode or the middle-speed mode.
3.1.3 Notes on the A-D converter
<Note 1>
Make the signal source impedance for analog input low, or equip an analog input pin with an external capacitor of
0.01
F to 1 F. Further, be sure to verify the operation of application products on the user side.
Reason
An analog input pin includes the capacitor for analog voltage comparison. Accordingly, when signals from signal
source with high impedance are input to an analog input pin, charge and discharge noise generates. This may cause
the A-D comparison precision to be worse.
<Note 2>
Pins AVCC and AVSS are A-D converter power source pins. Connect them as following :
qAVCC : Connect to the VCC line which is the analog system
qAVSS : Connect to the VSS line which is the analog system
b7
b0
Interrupt control register 2
Address 003F16
Interrupt control bits
Not used
Fix this bit to “0”
0