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參數(shù)資料
| 型號： | M38073M4-XXXFP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP80 |
| 封裝： | 0.80 MM PITCH, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 49/74頁 |
| 文件大小： | 1182K |
| 代理商： | M38073M4-XXXFP |
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53
3807 Group
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Processor Mode
Single-chip mode, memory expansion mode, and microprocessor
mode can be selected by changing the contents of the processor
mode bits (CM0 and CM1 : b1 and b0 of address 003B16). In memory
expansion mode and microprocessor mode, memory can be ex-
panded externally through ports P0 to P3. In these modes, ports P0
to P3 lose their I/O port functions and become bus pins.
Table. 7. Port functions in memory expansion mode and microprocessor mode
Port Name
Function
Port P0
Outputs 8-bits low-order byte of address.
Port P1
Outputs 8-bits high-order byte of address.
Port P2
Operates as I/O pins for data D7 to D0
(including instruction code)
Port P3
P30 and P31 function only as output pins
(except that the port latch cannot be read).
____
P3is the ONW input pin.
P33 is the RESTOUT output pin. (Note)
P34 is the
φ output pin.
P35 is the SYNC output pin.
___
P36 is the WR output pin, and P37 is the RD output
pin.
Note : If CNVSS is connected to VSS, the microcomputer goes to
single-chip mode after a reset, so this pin cannot be used as
the RESETOUT output pin.
(1) Single-chip mode
Select this mode by resetting the microcomputer with CNVSS
connected to VSS.
(2) Memory expansion mode
Select this mode by setting the processor mode bits (b1, b0) to "01"
in software with CNVSS connected to VSS. This mode enables
external memory expansion while maintaining the validity of the
internal ROM. However, some I/O devices will not support the memory
expansion mode. Internal ROM will take precedence over external
memory if addresses conflict.
(3) Microprocessor mode
Select this mode by resetting the microcomputer with CNVSS con-
nected to VCC, or by setting the processor mode bits to "10" in soft-
ware with CNVSS connected to VSS. In microprocessor mode, the
internal ROM is no longer valid and external memory must be used.
Fig. 59. Memory maps in various processor modes
Fig. 60. Structure of CPU mode register
000016
004016
084016
000816
000016
084016
YYYY16
FFFF16
000816
004016
FFFF16
internal RAM
reserved area
internal ROM
Memory expansion mode
The shaded area are external memory area.
SFR area
YYYY16 indicates the first address of internal ROM.
SFR area
Microprocessor mode
*
*:
internal RAM
reserved area
b0
CPU mode register
(CPUM : address 003B16)
Processor mode bits (CM1, CM0)
b1 b0
0
0: Single-chip mode
0
1: Memory expansion mode
1
0: Microprocessor mode
1
1: Not available
Stack page selection bit
0: 0 page
1: 1 page
b7
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