參數(shù)資料
型號(hào)： M38073M4-XXXFP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP80
封裝： 0.80 MM PITCH, PLASTIC, QFP-80
文件頁數(shù)： 44/74頁
文件大?。?/td> 1182K
代理商： M38073M4-XXXFP
49
3807 Group
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
0016
FF16
0016
FFFC16 contents
FF16
002616
002716
002816
002916
002A16
002B16
002C16
002D16
002E16
002F16
003016
003116
003216
003316
003416
003616
003716
003816
003916
003A16
003B16
003C16
003D16
003E16
003F16
(PS)
(PCH)
(PCL)
* The initial values depend on level of port CNVSS.
X: Not fixed
Since the initial values for other than above mentioned registers and RAM contents are indefinite at reset, they must be set.
Address Register contents
0016
FF16
0116
0016
000016
000116
000216
000316
000416
000516
000616
000716
000816
000916
000A16
000B16
000C16
000D16
000E16
000F16
001016
001116
001416
001516
001616
001716
001916
001A16
001B16
001D16
001E16
002016
002116
002216
002316
002416
002516
Timer X (low-order)
Timer 2
Port P0
Port P0 direction register
Port P1
Port P1 direction register
Port P2
Port P2 direction register
Port P3
Port P3 direction register
Port P4
Port P4 direction register
Port P5
Port P5 direction register
Port P6
Port P6 direction register
Port P7
Port P7 direction register
Port P8
Port P8 direction register
Timer XY control register
Port P2P3 control register
Pull-up control register
Watchdog timer control register
Serial I/O1 status register
Serial I/O1 control register
UART control register
Serial I/O2 control register 1
Serial I/O2 control register 2
Timer X (high-order)
Timer Y (low-order)
Timer Y (high-order)
Timer 1
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
(9)
(10)
(11)
(12)
(13)
(14)
(15)
(16)
(17)
(18)
(19)
(20)
(21)
(22)
(23)
(24)
(25)
(26)
(27)
(28)
(29)
(30)
(31)
(32)
(33)
(34)
(35)
(36)
(37)
(38)
(39)
(40)
(41)
(42)
(43)
(44)
(45)
(46)
(47)
(48)
(49)
(50)
(51)
(52)
(53)
(54)
(55)
(56)
(57)
(58)
(59)
(60) Program counter
Timer 3
Interrupt edge selection register
Timer X mode register
Timer Y mode register
Timer 123 mode register
Real time port register 0—7
Real time port control register 0
Real time port control register 1
R/W pointer
Output pointer
Real time port control register 2
R/W pointer
Output pointer
Real time port control register 3
Timer A (low-order)
Timer A (high-order)
Timer B (low-order)
Timer B (high-order)
D-A control register
A-D control register
D-A1 conversion register
D-A2 conversion register
D-A3 conversion register
D-A4 conversion register
CPU mode register
Interrupt request register 1
Interrupt request register 2
Interrupt control register 1
Interrupt control register 2
Processor status register
1
000
0
0016
11 1
0016
FFFD16 contents
!
1 !
!
0 10010
0
*
00 0 1 0 0
0
11 1
1
000
0
10 0 1 0 0
0
0 0 00 00
1
00 0 0 0
0
*
0 0 11 11
1
1 0 00 00
0
11 10 00
0
0 0 00 01
1
Fig. 54. Internal status at reset
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