參數(shù)資料
型號(hào): M38049FFHHP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 8.4 MHz, MICROCONTROLLER, PQFP64
封裝: 10 X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-64
文件頁(yè)數(shù): 70/116頁(yè)
文件大?。?/td> 1261K
代理商: M38049FFHHP
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Rev.1.01
Jan 25, 2005
page 57 of 114
REJ03B0131-0101Z
3804 Group (Spec. H)
D/A CONVERTER
The 3804 group (Spec. H) has two internal D/A converters (DA1
and DA2) with 8-bit resolution.
The D/A conversion is performed by setting the value in each DA
conversion register. The result of D/A conversion is output from
the DA1 or DA2 pin by setting the DA output enable bit to “1”.
When using the D/A converter, the corresponding port direction
register bit (P30/DA1 or P31/DA2) must be set to “0” (input status).
The output analog voltage V is determined by the value n (decimal
notation) in the DA conversion register as follows:
V = VREF n/256 (n = 0 to 255)
Where VREF is the reference voltage.
At reset, the DA conversion registers are cleared to “0016”, and
the DA output enable bits are cleared to “0”, and the P30/DA1 and
P31/DA2 pins become high impedance.
The DA output does not have buffers. Accordingly, connect an ex-
ternal buffer when driving a low-impedance load.
Fig. 52 Block diagram of D/A converter
Fig. 53 Equivalent connection circuit of D/A converter (DA1)
P30/DA1
DA1 conversion register (8)
R-2R resistor ladder
DA1 output enable bit
P31/DA2
DA2 conversion register (8)
R-2R resistor ladder
DA2 output enable bit
D
a
ta
b
u
s
AVSS
VREF
“0”
“1”
MSB
“0”
“1”
R
2R
R
2R
R
2R
R
2R
R
2R
R
2R
R
2R2R
LSB
2R
P30/DA1
DA1 conversion register
DA1 output enable bit
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