參數(shù)資料
型號: M38039MFL-XXXSP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 16.8 MHz, MICROCONTROLLER, PDIP64
封裝: 56.40 X 17 MM, 1.78 MM PITCH, PLASTIC, SDIP-64
文件頁數(shù): 79/121頁
文件大小: 2071K
代理商: M38039MFL-XXXSP
Rev.1.01
Jan 25, 2008
Page 58 of 117
REJ03B0212-0101
3803 Group (Spec.L)
Fig 51. Structure of PWM control register
Fig 52. PWM output timing when PWM register or PWM prescaler is changed
<Notes>
The PWM starts after the PWM function enable bit is set to enable and “L” level is output from the PWM pin.
The length of this “L” level output is as follows:
(Count source selection bit = 0, where n is the value set in the prescaler)
(Count source selection bit = 1, where n is the value set in the prescaler)
b7
b0
PWM control register
(PWMCON: address 002B16)
PWM function enable bit
0 : PWM disabled
1 : PWM enabled
Count source selection bit
0: f(XIN) (f(XCIN) at low-speed mode)
1: f(XIN)/2 (f(XCIN)/2 at low-speed mode)
Not used
(return “0” when read)
PWM output
T
T2
B
C
PWM register
write signal
PWM prescaler
write signal
(Changes “H” term from “A” to “ B”.)
(Changes PWM period from “T” to “T2”.)
B
T
C
T2
=
When the contents of the PWM register or PWM prescaler have changed,
the PWM output will change from the next period after the change.
A
n1
+
2
×fXIN
()
----------------------- sec
n1
+
fXIN
()
---------------- sec
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