參數(shù)資料
型號(hào): M38039MFH-XXXWG
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PBGA64
封裝: 6 X 6 MM, 0.65 MM PITCH, PLASTIC, FLGA-64
文件頁數(shù): 81/119頁
文件大?。?/td> 1818K
代理商: M38039MFH-XXXWG
Rev.3.11
Apr 5, 2006
Page 62 of 113
REJ03B0017-0311
3803 Group (Spec.H)
RESET CIRCUIT
To reset the microcomputer, RESET pin should be held at an “L”
level for 16 cycles or more of XIN. Then the RESET pin is
returned to an “H” level (the power source voltage should be
between 1.8 V and 5.5 V (between 2.7 V to 5.5 V for flash
memory version), and the oscillation should be stable), reset is
released. After the reset is completed, the program starts from the
address contained in address FFFD16 (high-order byte) and
address FFFC16 (low-order byte). Make sure that the reset input
voltage for the mask ROM version is less than 0.29 V for VCC of
1.8 V.
In the flash memory version, input to the RESET pin in the
following procedure.
When power source is stabilized
(1) Input “L” level to RESET pin.
(2) Input “L” level for 16 cycles or more to XIN pin.
(3) Input “H” level to RESET pin.
At power-on
(1) Input “L” level to RESET pin.
(2) Increase the power source voltage to 2.7 V.
(3) Wait for td(P-R) until internal power source has stabilized.
(4) Input “L” level for 16 cycles or more to XIN pin.
(5) Input “H” level to RESET pin.
Fig 57. Reset circuit example
Fig 58. Reset sequence
VCC
RESET
VCC
RESET
Power source
voltage detection
circuit
Example at VCC = 5 V
(1)
0 V
VCC
RESET
0.2VCC or less
0V
VCC
RESET
td(P-R)+XIN16 cycles or more
5V
2.7V
Notes 1: Reset release voltage
mask ROM version: Vcc = 1.8 V
Flash memory version: Vcc = 2.7 V
2: In the flash memory version, this time is required td(P-R)+XIN 16 cycles
or more.
(2)
RESET
Internal
reset
Data
φ
Address
SYNC
XIN
?
FFFC
FFFD
ADH,L
?
?ADL
ADH
Notes 1: The frequency relation of f(XIN) and f(
φ) is f(XIN) = 8 f(φ).
2: The question marks (?) indicate an undefined state that depends on the previous state.
Reset address from the
vector table.
XIN : 10.5 to 18.5 clock cycles
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