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| 型號(hào)： | M38039MCH-XXXKP |
| 元件分類(lèi)： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-64 |
| 文件頁(yè)數(shù)： | 80/119頁(yè) |
| 文件大?。?/td> | 1818K |
| 代理商： | M38039MCH-XXXKP |
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Rev.3.11
Apr 5, 2006
Page 61 of 113
REJ03B0017-0311
3803 Group (Spec.H)
WATCHDOG TIMER
The watchdog timer gives a mean of returning to the reset status
when a program cannot run on a normal loop (for example,
because of a software run-away). The watchdog timer consists of
an 8-bit watchdog timer L and an 8-bit watchdog timer H.
Watchdog Timer Initial Value
Watchdog timer L is set to “FF16” and watchdog timer H is set to
“FF16” by writing to the watchdog timer control register (address
001E16) or at a reset. Any write instruction that causes a write
signal can be used, such as the STA, LDM, CLB, etc. Data can
only be written to bits 6 and 7 of the watchdog timer control
register. Regardless of the value written to bits 0 to 5, the above-
mentioned value will be set to each timer.
Watchdog Timer Operations
The watchdog timer stops at reset and starts to count down by
writing to the watchdog timer control register (address 001E16).
An internal reset occurs at an underflow of the watchdog timer
H. The reset is released after waiting for a reset release time and
the program is processed from the reset vector address.
Accordingly, programming is usually performed so that writing
to the watchdog timer control register may be started before an
underflow. If writing to the watchdog timer control register is not
performed once, the watchdog timer does not function.
Bit 6 of Watchdog Timer Control Register
When bit 6 of the watchdog timer control register is “0”, the
MCU enters the stop mode by execution of STP instruction.
Just after releasing the stop mode, the watchdog timer restarts
counting(Note.). When executing the WIT instruction, the
watchdog timer does not stop.
When bit 6 is “1”, execution of STP instruction causes an
internal reset. When this bit is set to “1” once, it cannot be
rewritten to “0” by program. Bit 6 is “0” at reset.
The following shows the period between the write execution to
the watchdog timer control register and the underflow of
watchdog timer H.
Bit 7 of the watchdog timer control register is “0”:
when XCIN = 32.768 kHz; 32 s
when XIN = 16 MHz; 65.536 ms
Bit 7 of the watchdog timer control register is “1”:
when XCIN = 32.768 kHz; 125 ms
when XIN = 16 MHz; 256
s
Note. The watchdog timer continues to count even while waiting for a
stop release. Therefore, make sure that watchdog timer H does not
underflow during this period.
Fig 55. Block diagram of Watchdog timer
Fig 56. Structure of Watchdog timer control register
XIN
Data bus
XCIN
“10”
“00”
“01”
Main clock division
ratio selection bits(1)
“0”
“1”
1/16
Watchdog timer H count
source selection bit
Reset
circuit
STP instruction function selection bit
Watchdog timer H (8)
“FF16” is set when
watchdog timer
control register is
written to.
Internal reset
Watchdog timer L (8)
“FF16” is set when
watchdog timer
control register is
written to.
Note 1: Any one of high-speed, middle-speed or low-speed mode is selected by bits 7 and 6 of the CPU mode register.
STP instruction
RESET
b7
Watchdog timer H (for read-out of high-order 6 bit)
STP instruction function selection bit
0: Entering stop mode by execution of STP instruction
1: Internal reset by execution of STP instruction
Watchdog timer H count source selection bit
0: Watchdog timer L underflow
1: f(XIN)/16 or f(XCIN)/16
Watchdog timer control register
(WDTCON : address 001E16)
b0
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| M38037M6H-XXXFP | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M38049FFFP#U0 | 制造商:Renesas Electronics Corporation 功能描述: |
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| M3806 | 功能描述:電纜固定件和配件 LTSCG 625 BLACK RoHS:否 制造商:Heyco 類(lèi)型:Cable Grips, Liquid Tight 材料:Nylon 顏色:Black 安裝方法:Cable 最大光束直徑:11.4 mm 抗拉強(qiáng)度: |
| M3806 BK001 | 制造商:Alpha Wire Company 功能描述:CBL 8COND 18AWG BLK 1000' |
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