參數(shù)資料
型號(hào): M38039GCH-XXXWG
元件分類: 微控制器/微處理器
英文描述: 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PBGA64
封裝: 6 X 6 MM, 0.65 PITCH, FLGA-64
文件頁數(shù): 41/103頁
文件大小: 1412K
代理商: M38039GCH-XXXWG
REJ03B0166-0113 Rev.1.13
Aug 21, 2009
Page 42 of 100
3803 Group (Spec.H QzROM version)
Fig 29. Structure of timer Z mode register
b7
b0
Timer Z mode register
(TZM : address 002A16)
Timer Z operating mode bits
b2 b1 b0
0 0 0 : Timer/Event counter mode
0 0 1 : Pulse output mode
0 1 0 : Pulse period measurement mode
0 1 1 : Pulse width measurement mode
1 0 0 : Programmable waveform generating mode
1 0 1 : Programmable one-shot generating mode
1 1 0 : Not available
1 1 1 : Not available
Timer Z write control bit
0 : Writing data to both latch and timer simultaneously
1 : Writing data only to latch
Output level latch
0 : “L” output
1 : “H” output
CNTR2 active edge switch bit
0 :
Event counter mode: Count at rising edge
Pulse output mode: Start outputting “H”
Pulse period measurement mode: Measurement between two falling edges
Pulse width measurement mode: Measurement of “H” term
Programmable one-shot generating mode: After start outputting “L”,
“H” one-shot pulse generated
Interrupt at falling edge
1 :
Event counter mode: Count at falling edge
Pulse output mode: Start outputting “L”
Pulse period measurement mode: Measurement between two rising edges
Pulse width measurement mode: Measurement of “L” term
Programmable one-shot generating mode: After start outputting “H”,
“L” one-shot pulse generated
Interrupt at rising edge
Timer Z count stop bit
0 : Count start
1 : Count stop
Timer/Event counter mode switch bit (Note)
0 : Timer mode
1 : Event counter mode
Note:
When selecting the modes except the timer/event counter mode, set “0” to this bit.
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