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| 型號： | M38039GCH-XXXHP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
| 封裝： | 10 X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-64 |
| 文件頁數(shù)： | 28/103頁 |
| 文件大?。?/td> | 1412K |
| 代理商： | M38039GCH-XXXHP |
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REJ03B0166-0113 Rev.1.13
Aug 21, 2009
Page 30 of 100
3803 Group (Spec.H QzROM version)
Interrupt Request Generation, Acceptance, and Handling
Interrupts have the following three phases.
(i)
Interrupt Request Generation
An interrupt request is generated by an interrupt source
(external interrupt signal input, timer underflow, etc.) and
the corresponding request bit is set to “1”.
(ii) Interrupt Request Acceptance
Based on the interrupt acceptance timing in each instruction
cycle, the interrupt control circuit determines acceptance
conditions (interrupt request bit, interrupt enable bit, and
interrupt disable flag) and interrupt priority levels for
accepting interrupt requests. When two or more interrupt
requests are generated simultaneously, the highest priority
interrupt is accepted. The value of interrupt request bit for
an unaccepted interrupt remains the same and acceptance is
determined at the next interrupt acceptance timing point.
(iii) Handling of Accepted Interrupt Request
The accepted interrupt request is processed.
Figure 22 shows the time up to execution in the interrupt
processing routine, and Figure 23 shows the interrupt sequence.
Figure 24 shows the timing of interrupt request generation,
interrupt request bit, and interrupt request acceptance.
Interrupt Handling Execution
When interrupt handling is executed, the following operations
are performed automatically.
(1) Once the currently executing instruction is completed, an
interrupt request is accepted.
(2) The contents of the program counters and the processor
status register at this point are pushed onto the stack area in
order from 1 to 3.
1. High-order bits of program counter (PCH)
2. Low-order bits of program counter (PCL)
3. Processor status register (PS)
(3) Concurrently with the push operation, the jump address of
the corresponding interrupt (the start address of the interrupt
processing routine) is transferred from the interrupt vector to
the program counter.
(4) The interrupt request bit for the corresponding interrupt is
set to “0”. Also, the interrupt disable flag is set to “1” and
multiple interrupts are disabled.
(5) The interrupt routine is executed.
(6) When the RTI instruction is executed, the contents of the
registers pushed onto the stack area are popped off in the
order from 3 to 1. Then, the routine that was before running
interrupt processing resumes.
As described above, it is necessary to set the stack pointer and
the jump address in the vector area corresponding to each
interrupt to execute the interrupt processing routine.
Fig 22. Time up to execution in interrupt routine
7 cycles
Interrupt request
generated
Interrupt request
acceptance
Interrupt routine
starts
Interrupt sequence
*
0 to 16 cycles
7 to 23 cycles
* When executing DIV instruction
Main routine
Stack push and
Vector fetch
Interrupt handling
routine
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|---|---|
| M38039G8H-XXXKP | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
| M38039GCH-XXXKP | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
| M38039GCH-XXXWG | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PBGA64 |
| M38039G8HKP | 8-BIT, MROM, 8.4 MHz, MICROCONTROLLER, PQFP64 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M38049FFFP#U0 | 制造商:Renesas Electronics Corporation 功能描述: |
| M38049FFLHP#U0 | 制造商:Renesas Electronics Corporation 功能描述: |
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| M3806 | 功能描述:電纜固定件和配件 LTSCG 625 BLACK RoHS:否 制造商:Heyco 類型:Cable Grips, Liquid Tight 材料:Nylon 顏色:Black 安裝方法:Cable 最大光束直徑:11.4 mm 抗拉強(qiáng)度: |
| M3806 BK001 | 制造商:Alpha Wire Company 功能描述:CBL 8COND 18AWG BLK 1000' |
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