參數(shù)資料
型號(hào): M38030F2L-XXXWG
廠商: Renesas Technology Corp.
英文描述: SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述: 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù): 15/119頁(yè)
文件大小: 1575K
代理商: M38030F2L-XXXWG
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Rev.1.00
REJ03B0212-0100
Apr 2, 2007
Page 15 of 117
3803 Group (Spec.L)
Fig 12. Memory map of special function register (SFR)
0000
16
0001
16
0002
16
0003
16
0004
16
0005
16
0006
16
0007
16
0008
16
0009
16
000A
16
000B
16
000C
16
000D
16
000E
16
000F
16
0010
16
0011
16
0012
16
0013
16
0014
16
0015
16
0016
16
0017
16
0018
16
0019
16
001A
16
001B
16
001C
16
001D
16
001E
16
001F
16
0020
16
0021
16
0022
16
0023
16
0024
16
0025
16
0026
16
0027
16
0028
16
0029
16
002A
16
002B
16
002C
16
002D
16
002E
16
002F
16
0030
16
0031
16
0032
16
0033
16
0034
16
0035
16
0036
16
0037
16
0038
16
0039
16
003A
16
003B
16
003C
16
003D
16
003E
16
003F
16
Port P0 (P0)
Port P0 direction register (P0D)
Port P1 (P1)
Port P1 direction register (P1D)
Port P2 (P2)
Port P2 direction register (P2D)
Port P3 (P3)
Port P3 direction register (P3D)
Port P4 (P4)
Port P4 direction register (P4D)
Port P5 (P5)
Port P5 direction register (P5D)
Port P6 (P6)
Port P6 direction register (P6D)
Timer 12, X count source selection register (T12XCSS)
Timer Y, Z count source selection register (TYZCSS)
MISRG
Reserved (Note 1)
Reserved (Note 1)
Reserved (Note 1)
Reserved (Note 1)
Reserved (Note 1)
Reserved (Note 1)
Reserved (Note 1)
Transmit/Receive buffer register 1 (TB1/RB1)
Serial I/O1 status register (SIO1STS)
Serial I/O1 control register (SIO1CON)
UART1 control register (UART1CON)
Baud rate generator (BRG1)
Serial I/O2 control register (SIO2CON)
Watchdog timer control register (WDTCON)
Serial I/O2 register (SIO2)
Prescaler 12 (PRE12)
Timer 1 (T1)
Timer 2 (T2)
Timer XY mode register (TM)
Prescaler X (PREX)
Timer X (TX)
Prescaler Y (PREY)
Timer Y (TY)
Timer Z low-order (TZL)
Timer Z high-order (TZH)
Timer Z mode register (TZM)
PWM control register (PWMCON)
PWM prescaler (PREPWM)
PWM register (PWM)
Baud rate generator 3 (BRG3)
Transmit/Receive buffer register 3 (TB3/RB3)
Serial I/O3 status register (SIO3STS)
Serial I/O3 control register (SIO3CON)
UART3 control register (UART3CON)
AD/DA control register (ADCON)
AD conversion register 1 (AD1)
DA1 conversion register (DA1)
DA2 conversion register (DA2)
AD conversion register 2 (AD2)
Interrupt source selection register (INTSEL)
Interrupt edge selection register (INTEDGE)
CPU mode register (CPUM)
Interrupt request register 1 (IREQ1)
Interrupt request register 2 (IREQ2)
Interrupt control register 1 (ICON1)
Interrupt control register 2 (ICON2)
Notes1
: Do not write any data to these addresses, because these are
reserved area.
2
: Do not access to the SFR area including nothing.
0FE0
16
0FE1
16
0FE2
16
0FE3
16
0FE4
16
0FE5
16
0FE6
16
0FE7
16
0FE8
16
0FE9
16
0FEA
16
0FEB
16
0FEC
16
0FED
16
0FEE
16
0FEF
16
0FF0
16
0FF1
16
0FF2
16
0FF3
16
0FF4
16
0FF5
16
0FF6
16
Flash memory control register 0 (FMCR0)
Flash memory control register 1 (FMCR1)
Flash memory control register 2 (FMCR2)
Reserved (Note 1)
Reserved (Note 1)
Reserved (Note 1)
Reserved (Note 1)
Reserved (Note 1)
Reserved (Note 1)
Reserved (Note 1)
Reserved (Note 1)
Reserved (Note 1)
Reserved (Note 1)
Reserved (Note 1)
Reserved (Note 1)
Reserved (Note 1)
Port P0 pull-up control register (PULL0)
Port P1 pull-up control register (PULL1)
Port P2 pull-up control register (PULL2)
Port P3 pull-up control register (PULL3)
Port P4 pull-up control register (PULL4)
Port P5 pull-up control register (PULL5)
Port P6 pull-up control register (PULL6)
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