參數(shù)資料
型號： M38006M2-XXXFP
廠商： Mitsubishi Electric Corporation
元件分類： 串行ADC
英文描述： 8-Bit 37.9 kSPS ADC Serial Out, Ratiometric Op or Vcc Ref, TTL/MOS Input & Output Compatible, 8 Ch. 20-PDIP
中文描述： 8位單片機
文件頁數(shù)： 37/173頁
文件大小： 4203K
代理商： M38006M2-XXXFP
HARDWARE
1-23
3800 GROUP USER’S MANUAL
Asynchronous serial I/O (UART) mode
Clock asynchronous serial I/O mode (UART) can be selected by
clearing the serial I/O mode selection bit of the serial I/O control
register to “0”.
Eight serial data transfer formats can be selected, and the transfer
formats used by a transmitter and receiver must be identical.
The transmit and receive shift registers each have a buffer, but the
two buffers have the same address in memory. Since the shift reg-
ister cannot be written to or read from directly, transmit data is
written to the transmit buffer, and receive data is read from the re-
ceive buffer.
The transmit buffer can also hold the next data to be transmitted,
and the receive buffer can hold a character while the next charac-
ter is being received.
Fig. 19 Block diagram of UART serial I/O
FUNCTIONAL DESCRIPTION
f(X
IN
)
1/4
OE
PE FE
1/16
1/16
Data bus
Receive buffer
Address 0018
16
Receive shift register
Receive buffer full flag (RBF)
Receive interrupt request (RI)
Baud rate generator
Address 001C
16
Frequency division ratio 1/(n+1)
ST/SP/PA generator
Transmit buffer
Data bus
Transmit shift register
Address
0018
16
Transmit shift completion flag (TSC)
Transmit buffer empty flag (TBE)
Address
0019
16
Serial I/O status register
Transmit interrupt request (TI)
STdetector
SP detector
UART control register
Address 001B
16
Character length selection bit
Address 001A
16
BRG count source selection bit
Transmit interrupt source selection bit
Serial I/O synchronous clock selection bit
Clock control circuit
Character length selection bit
7 bits
8 bits
Serial I/O control register
P4
6
/S
CLK
P4
4
/R
X
D
P4
5
/T
X
D
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