參數(shù)資料
型號： M38006M2-XXXFP
廠商： Mitsubishi Electric Corporation
元件分類： 串行ADC
英文描述： 8-Bit 37.9 kSPS ADC Serial Out, Ratiometric Op or Vcc Ref, TTL/MOS Input & Output Compatible, 8 Ch. 20-PDIP
中文描述： 8位單片機
文件頁數(shù)： 136/173頁
文件大?。?/td> 4203K
代理商： M38006M2-XXXFP
3800 GROUP USER’S MANUAL
3-34
APPENDIX
3.5 List of registers
Fig. 3.5.12 Structure of Interrupt edge selection register
Fig. 3.5.13 Structure of CPU mode register
3
4
5
6
7
2
0
1
CPU mode register (CPUM) [Adress : 3B
16
]
Nothing is allocated for these bits. These are write
disabled bits. When these bits are read out, the
values are “0.”
0
0
0
0
0
0
0
CPU mode register
b7 b6 b5 b4 b3 b2 b1 b0
Processor mode bits
00 :
Single-chip mode
01 :
Memory expansion mode
10 :
Microprocessor mode
11 :
Not available
0 :
0 page
1 :
1 page
Stack page selection
bit
6
An initial value of bit 1 is determined by a level of the CNV
SS
pin.
6
At reset
B
Name
Function
R W
Interrupt edge selection register (INTEDGE) [Address : 3A
16
]
Interrupt edge selection register
INT
0
interrupt edge
selection bit
INT
1
interrupt edge
selection bit
INT
2
interrupt edge
selection bit
0 : Falling edge active
1 : Rising edge active
0 : Falling edge active
1 : Rising edge active
0 : Falling edge active
1 : Rising edge active
0
INT
3
interrupt edge
selection bit
INT
4
interrupt edge
selection bit
INT
5
interrupt edge
selection bit
0 : Falling edge active
1 : Rising edge active
0 : Falling edge active
1 : Rising edge active
0 : Falling edge active
1 : Rising edge active
Nothing is allocated for these bits. These are write disabled
bits. When these bits are read out, the values are “0.”
0
0
0
0
0
0
0
At reset
B
0
Name
Function
R W
1
2
3
4
5
6
7
b7 b6 b5 b4 b3 b2 b1 b0
相關PDF資料
PDF描述
M38006M2-XXXFS 8-Bit 37.9 kSPS ADC Serial Out, Ratiometric Op or Vcc Ref, TTL/MOS Input & Output Compatible, 8 Ch. 20-TSSOP 0 to 70
M38006M2-XXXHP 8-Bit 37.9 kSPS ADC Serial Out, Ratiometric Op or Vcc Ref, TTL/MOS Input & Output Compatible, 8 Ch. 20-TSSOP 0 to 70
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