參數(shù)資料
型號(hào): M38002E4FS
元件分類: 微控制器/微處理器
英文描述: 8-BIT, UVPROM, 8 MHz, MICROCONTROLLER, CQCC64
封裝: QFN-64
文件頁數(shù): 169/174頁
文件大?。?/td> 1752K
代理商: M38002E4FS
APPLICATION
2.3 Serial I/O
2-45
3800 GROUP USER’S MANUAL
Fig. 2.3.31 Setting of related registers at a transmitting side [Communication using UART]
b7
b0
00 0
b7
b0
b7
b0
Serial I/O status register (Address : 1916)
SIOSTS
Transmitting side
Baud rate generator (Address : 1C16)
BRG
SIOCON
BRG count source selection bit : f(XIN)/4
Serial I/O synchronous clock selection bit : BRG/16
Transmit enable bit : Transmit enabled
Receive enable bit : Receive disabled
Serial I/O mode selection bit : Asynchronous serial I/O(UART)
Serial I/O enable bit : Serial I/O enabled
SRDY
output enable bit : Not use SRDY out
UART control register (Address : 1B16)
UARTCON
Character length selection bit : 8 bits
Parity enable bit : Parity checking disabled
P45/TXD P-channel output disable bit : CMOS output
Stop bit length selection bit : 2 stop bits
f(XIN)
Transfer bit rate ! 16 ! m
– 1
Transmit buffer empty flag
Check to be transferred data from the Transmit buffer
register to the Transmit shift register.
Writable the next transmission data to the Transmit buffer
register at being set to “1.”
Transmit shift register shift completion flag
Check a completion of transmitting 1-byte data with this flag.
“1” : Transmit shift completed
Serial I/O control register (Address : 1A16)
Set
when bit 0 of the Serial I/O control register (Address : 1A16) is set to “0,”
a value of m is 1.
when bit 0 of the Serial I/O control register (Address : 1A16) is set to “1,”
a value of m is 4.
T
10 0 1
0 0 1
1
b7
b0
7
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