參數(shù)資料
型號(hào)： M37906M6C-XXXSP
元件分類： 微控制器/微處理器
英文描述： 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PDIP42
封裝： 0.600 INCH, 1.78 MM PITCH, PLASTIC, SDIP-42
文件頁數(shù)： 62/101頁
文件大小： 766K
代理商： M37906M6C-XXXSP
63
M37906M4C-XXXFP, M37906M4C-XXXSP, M37906M4H-XXXFP
M37906M4H-XXXSP, M37906M6C-XXXFP, M37906M6C-XXXSP
M37906M8C-XXXFP, M37906M8C-XXXSP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Som
e param
etric
lim
its are
subject
to change.
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Operation mode
The operation mode is selected by bits 3 and 4 of A-D control regis-
ter 0 and bit 2 of A-D control register 1. The available operation
modes are one-shot, repeat, single sweep, and repeat sweep 0. Ei-
ther an A-D converter or a comparator can be selected respectively
for every pin in the following 4 modes. The following description ap-
plies to the case where the bit of the comparator function select reg-
ister 0 is “0” and an A-D converter is selected. It also applies to a
comparator’s operation except that an A-D conversion is changed to
a comparator operation and the result of a comparison is stored into
the comparator result register 0.
(1) One-shot mode
One-shot mode is selected when bits 3 and 4 of A-D control register
0 are “0”. The A-D conversion pins are selected with bits 0 to 2 of
A-D control register 0. A-D conversion or comparator operation is
started when bit 6 of A-D control register 0 (A-D conversion start bit)
is set to “1”.
When the ANi (i = 4 through 0) comparator function select bit (bits 4
through 0) of the comparator function select register 0 = “0” and bit 3
of the A-D control register 1 = “1”, A-D conversion ends 59
φAD cycles
after, and the interrupt request bit of the A-D conversion interrupt
control register is set to “1”. At the same time, bit 6 of the A-D control
register 0 (A-D conversion start bit) is cleared to “0” and this A-D con-
version stops. The result of A-D conversion is stored into the A-D
register corresponding to the selected pin.
When the ANi (i = 4 through 0) comparator function select bit (bits 4
through 0) of the comparator function select register 0 = “1”, a com-
parator operation ends 14
φAD cycles after, and the interrupt request
bit of the A-D conversion interrupt control register is set to “1”. At the
same time, bit 6 of the A-D control register 0 (A-D conversion start
bit) is cleared to “0” and the comparator operation stops. The result
of the comparison is stored into the bits of the comparator result reg-
ister corresponding to the selected pin.
Fig. 70 Bit configuration of A-D control register 0
A-D control register 0
Address
1E16
76543210
Analog input select bits (Note 1)
(Valid in the one-shot mode and repeat mode.)
0 0 0 : AN0
0 0 1 : AN1
0 1 0 : AN2
0 1 1 : AN3 (Note 2)
1 0 0 : AN4 (Note 3)
1 0 1 : Do not select.
1 1 0 : Do not select.
1 1 1 : Do not select.
A-D operation mode select bit 0
0 0 : One-shot mode
0 1 : Repeat mode
1 0 : Single sweep mode
1 1 : Repeat sweep mode 0
Fix this bit to “0”.
A-D conversion start bit (Note 4)
0 : A-D conversion stopped.
1 : A-D conversion started.
A-D conversion frequency (
φAD) select bit 0
0
Notes 1: Invalid in the single sweep mode and repeat sweep mode 0. (Each of these bits may be “0” or “1”.)
2: When using pin AN3, make sure that the D-A0 output enable bit (bit 0 at address 9616) = “0” (output disabled).
3: When using pin AN4, make sure that the D-A1 output enable bit (bit 1 at address 9616) = “0” (output disabled).
4: Use the MOVM (MOVMB) or STA (STAB or STAD) instruction for rewriting to this bit.
5: Rewriting to each bit of the A-D control register 0 (except for bit 6) must be performed while A-D conversion is stopped.
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