26
M37906M4C-XXXFP, M37906M4C-XXXSP, M37906M4H-XXXFP
M37906M4H-XXXSP, M37906M6C-XXXFP, M37906M6C-XXXSP
M37906M8C-XXXFP, M37906M8C-XXXSP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
param
etric
lim
its are
subject
to change.
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
TIMER
There are eight 16-bit timers. They are divided by type into timer A
(10) and timer B (3).
The timer I/O pins are multiplexed with I/O pins for ports P2, P5 and
P6. To use these pins as timer input pins, the port direction register
bit corresponding to the pin must be cleared to “0” to specify input
mode.
TIMER A
Figure 18 shows a block diagram of timer A.
Timer A has four modes: timer mode, event counter mode, one-shot
pulse mode, and pulse width modulation mode. The mode is se-
lected with bits 0 and 1 of the timer Ai mode register (i = 0 to 9). Each
of these modes is described below.
Figure 19 shows the bit configuration of the timer A clock division se-
lect register. Timers A0 to A9 use the count source which has been
selected by bits 0 and 1 of this register.
Each of timers A3, and A5 through A8 has no its own I/O pins. There-
fore, these timers are available only in the timer mode.
(1) Timer mode [00]
Figure 20 shows the bit configuration of the timer Ai mode register in
the timer mode. Bits 0, 1 and 5 of the timer Ai mode register must be
“0” in timer mode. The timer A’s count source is selected by bits 6
and 7 of the timer Ai mode register and the contents of the timer A
clock division select register. (See Table 7.)
The counting of the selected clock starts when the count start bit is
“1” and stops when it is “0”.
Figure 21 shows the bit configuration of the count start bit. The
counter is decremented, an interrupt is caused and the interrupt re-
quest bit in the timer Ai interrupt control register is set when the con-
tents becomes 000016. At the same time, the contents of the reload
register is transferred to the counter and count is continued.
Fig. 18 Block diagram of timer A
Timer
One-shot pulse
Pulse width
Count start registers 0, 1
(Addresses 4016, 4116)
Countdown
Data bus (odd)
Data bus (even)
Reload register(16)
Counter (16)
(Low-order 8 bits)
(High-order 8 bits)
“Countdown” is always
selected when not in the
event counter mode.
Timer A0 4716 4616
Timer A1 4916 4816
Timer A2 4B16 4A16
Timer A3 4D16 4C16
Timer A4 4F16 4E16
Countup/Countdown switching
Toggle flip-flop
Up-down registers 0, 1
(Addresses 4416, C416)
Polarity
selection
Addresses
External trigger
Event counter
TAiIN
(i = 0–9)
TAiOUT
(i = 0–9)
Timer (gate function)
Count source
select bits
Pulse output
f1
f2
f16
f64
f512
f4096
Timer A clock
division select bit
(Note)
Timer A5 C716 C616
Timer A6 C916 C816
Timer A7 CB16 CA16
Timer A8 CD16 CC16
Timer A9 CF16 CE16
Addresses
Note: Each of timers A3, and A5 through A8 has no I/O pin.