參數(shù)資料
型號: M37905F8CFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP64
封裝: 14 X 14 MM, 0.80 MM PITCH, PLASTIC, QFP-64
文件頁數(shù): 19/29頁
文件大?。?/td> 284K
代理商: M37905F8CFP
26
M37905F8CFP, M37905F8CSP
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Som
e param
etric
lim
its are
subject
to change.
16-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
Resolution
Absolute accuracy
Ladder resistance
Conversion time
Reference voltage
Analog input voltage
—————
RLADDER
tCONV
VREF
VIA
VREF = VCC
f(fsys)
≤ 20 MHz
Max.
A-D CONVERTER CHARACTERISTICS
(VCC = AVCC = 5 V ± 0.5 V, VSS = AVSS = 0 V, Ta = –20 to 85 °C, unless otherwise noted)
Unit
Parameter
Symbol
Test conditions
Limits
Min.
10-bit resolution mode
8-bit resolution mode
Comparater
10-bit resolution mode
8-bit resolution mode
Comparater
5
5.9
2.45 (Note)
0.7 (Note)
2.7
0
10
± 3
± 2
± 40
VCC
VREF
Bits
V
LSB
mV
k
s
V
Note: This is applied when A-D conversion freguency (
φAD) = f1 (φ).
D-A CONVERTER CHARACTERISTICS
(VCC = 5 V, VSS = AVSS = 0 V, VREF = 5 V, Ta = –20 to 85 °C, unless otherwise noted)
Unit
Parameter
Symbol
Limits
Typ.
Min.
Max.
Test conditions
Resolution
Absolute accuracy
Set time
Output resistance
Reference power source input current
——
tsu
RO
IVREF
(Note)
2
3.5
8
± 1.0
3
4.5
3.2
Bits
%
s
k
mA
Note: The test conditions are as follows:
One D-A converter is used.
The D-A register value of the unused D-A converter is “0016.”
The reference power source input current for the ladder resistance of the A-D converter is excluded.
s
RESET input low-level pulse width
tw(RESETL)
Symbol
Parameter
Min.
Limits
Unit
RESET INPUT
Reset input timing requirements (VCC = 5 V ± 0.5 V, VSS = 0V, Ta = –20 to 85 °C, unless otherwise noted)
10
Max.
Typ.
RESET input
tw(RESETL)
A-D converter
Comparator
256
1
VREF
Typ.
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