參數(shù)資料
型號(hào): M37753FFCFP
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP80
封裝: PLASTIC, QFP-80
文件頁(yè)數(shù): 43/67頁(yè)
文件大?。?/td> 0K
代理商: M37753FFCFP
48
MITSUBISHI MICROCOMPUTERS
M37753FFCFP
M37753FFCHP
SHINGLE-CHIP 16-BIT CMOS MICROCOMPUTER FLASH MEMORY VERSION
PRELIMINAR
Y
Notice:
This
is not
a final
specification.
Some
parametric
limits
are
subject
to change.
Data setup time with address stabilized
φ high-level pulse width, φ low-level pulse width
E low-level pulse width
Address output delay time
ALE output delay time
ALE pulse width
BHE outupt delay time
R/W output delay time
Address hold time
Data hold time
Floating release delay time
BHE hold time
R/W hold time
Bus timing data formulas
Memory expansion and Microprocessor mode : Low-speed running (VCC = 5 V±10 %, VSS = 0 V, Ta = –20 to 85 °C, f(XIN)
≤ 25 MHz when
the clock source select bit = “0”, unless otherwise noted)
V: f(XIN)
≤ 12.5 MHz when the clock source select bit = “1”
Note: When the clock source select bit is “1”, regard f(XIN) in tables as 2f(XIN).
4-
φ access
Symbol
tsu(An/A–D)
tw
(
φH),tw(φL)
tw(EL)
td(An–E)
td(A–E)
td(A–ALE)
td(E–ALE)
tw(ALE)
td(BHE–E)
td(R/W–E)
th(E–An)
th(ALE–A)
th(E–DQ)
tpzx(E–DZ)
td(E–BHE)
td(E–R/W)
Parameter
2-
φ access
3-
φ access
ns
Unit
5
× 109
f(XIN)
–65
4
× 109
f(XIN)
–25
7
× 109
f(XIN)
–65
3
× 109
f(XIN)
–28
3
× 109
f(XIN)
–28
2
× 109
f(XIN)
–28
2
× 109
f(XIN)
–18
3
× 109
f(XIN)
–25
3
× 109
f(XIN)
–25
1
× 109
f(XIN)
–15
3
× 109
f(XIN)
–65
1
× 109
f(XIN)
–20
2
× 109
f(XIN)
–25
1
× 109
f(XIN)
–28
1
× 109
f(XIN)
–28
1
× 109
f(XIN)
–35
1
× 109
f(XIN)
–20
1
× 109
f(XIN)
–18
1
× 109
f(XIN)
–25
1
× 109
f(XIN)
–25
1
× 109
f(XIN)
–30
1
× 109
f(XIN)
–22
1
× 109
f(XIN)
–22
1
× 109
f(XIN)
–30
1
× 109
f(XIN)
–30
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