37
MITSUBISHI MICROCOMPUTERS
M37702M2AXXXFP, M37702M2BXXXFP
M37702S1AFP, M37702S1BFP
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Fig. 48 Microcomputer internal status during reset
Fig. 49 Example of a reset circuit (perform careful evaluation
at the system design level before using)
RESET CIRCUIT
Reset occurs when the RESET pin is returned to “H” level after
holding it at “L” level when the power voltage is at 5 V ± 10%. Pro-
gram execution starts at the address formed by setting the
address pins A
23
– A
16
to 00
16
, A
15
– A
8
to the contents of address
FFFF
16
, and A
7
– A
0
to the contents of address FFFE
16
.
Figure 48 shows the status of the internal registers when a reset
occurs.
Figure 49 shows an example of a reset circuit. The reset input
voltage must be held 0.9 V or lower when the power voltage
reaches 4.5 V.
V
CC
RESET
0V
0V
4.5V
0.9V
Power on
M37702M2AXXXFP
69
28
Address
00
16
0 0 0 0
00
16
00
16
00
16
00
16
00
16
00
16
0
1 1
0 0
0 0
00
16
00
16
0 0
0 0
0 0
0 0
0 0
1 0
0 0
1 0
0 0
0 0
1 0
1 0
00
16
0 0 0
0
0
00
16
00
16
00
16
00
16
00
16
00
16
0 0 1
0 0
0
0
0 0 1
0 0 1
0 0
0
0
0 0
0
0
(04
16
)
(05
16
)
(08
16
)
(09
16
)
(0C
16
)
(0D
16
)
(10
16
)
(11
16
)
(14
16
)
(1E
16
)
(1F
16
)
(30
16
)
(38
16
)
(34
16
)
(3C
16
)
(35
16
)
(3D
16
)
(40
16
)
(42
16
)
(44
16
)
(56
16
)
(57
16
)
(58
16
)
(59
16
)
(5A
16
)
(5B
16
)
(5C
16
)
(5D
16
)
(1) Port P0 data direction register
(2) Port P1 data direction register
(3) Port P2 data direction register
(4) Port P3 data direction register
(5) Port P4 data direction register
(6) Port P5 data direction register
(7) Port P6 data direction register
(8) Port P7 data direction register
(9) Port P8 data direction register
(10) A-D control register
(11)
A-D sweep pin selection register
(12)
UART 0 transmit/receive mode
register
(13)
UART 1 transmit/receive mode
register
(14)
UART 0 transmit/receive
control register 0
(15)
UART 1 transmit/receive
control register 0
(16)
UART 0 transmit/receive
control register 1
(17)
UART 1 transmit/receive
control register 1
(18) Count start flag
(19) One- shot start flag
(20) Up-down flag
(21) Timer A0 mode register
(22) Timer A1 mode register
(23) Timer A2 mode register
(24) Timer A3 mode register
(25) Timer A4 mode register
(26) Timer B0 mode register
(27) Timer B1 mode register
(28) Timer B2 mode register
Address
(7F
16
)
(70
16
)
(71
16
)
(72
16
)
(73
16
)
(74
16
)
(75
16
)
(76
16
)
(77
16
)
(78
16
)
(79
16
)
(7A
16
)
(7B
16
)
(7C
16
)
(7D
16
)
(7E
16
)
(32)
A-D conversion interrupt control register
(33)
UART 0 transmission interrupt control
register
(34)
UART 0 receive interrupt control register
(35)
UART 1 transmission interrupt control
register
(36)
UART 1 receive interrupt control register
(37)
Timer A0 interrupt control register
(44)
Timer B2 interrupt control register
(38)
Timer A1 interrupt control register
(39)
Timer A2 interrupt control register
(40)
Timer A3 interrupt control register
(41)
Timer A4 interrupt control register
(42)
Timer B0 interrupt control register
(43)
Timer B1 interrupt control register
(48) Processor status register PS
(49) Program bank register PG
(50) Program counter PC
H
(51) Program counter PC
L
(52) Direct page register DPR
(53) Data bank register DT
(45)
INT
0
interrupt control register
Contents of other registers and RAM are not initialized and should be initialized by software.
0
0
0
0 0 0 0
0 0 0
0 0 0
0 0 0
1
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0 0 0 0
0
0
0
0
0
0
00
16
00
16
Content of FFFF
16
Content of FFFE
16
0000
16
0
0
0
0
0
0
(46)
INT
1
interrupt control register
(47)
INT
2
interrupt control register
00
16
(61
16
)
(31)
Watchdog timer frequency selection
flag
0
00
16
(5E
16
)
(29)
Processor mode register
(60
16
)
(30)
Watchdog timer
FFF
16