參數(shù)資料
型號(hào)： M37640M8-111FP
廠商： Mitsubishi Electric Corporation
英文描述： SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
中文描述： 單芯片8位CMOS微機(jī)
文件頁(yè)數(shù)： 3/96頁(yè)
文件大小： 1477K
代理商： M37640M8-111FP
3
Ver 1.4
MITSUBISHI MICROCOMPUTERS
7640 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
1.5 PIN DESCRIPTION AND LAYOUT
Table 1.1. Pin Description and Layout
NAME
I/O
DESCRIPTION
PIN #
P0
0
/AB0~ P1
7
/AB15
I/O
CMOS I/O port (address bus). When the MCU is in memory expansion or
microprocessor mode, these pins function as the address bus.
CMOS I/O port (data bus). When the MCU is in memory expansion or microprocessor
mode, these pins function as the data bus. These pins may also be used to implement
the Key-on Wake up function.
CMOS I/O port (Ready). When the MCU is in memory expansion or microprocessor
mode, this pin functions as RDY (hardware wait cycle control).
CMOS I/O port.
CMOS I/O port.
56-41
P2
0
/DB0 ~ P2
7
/DB7
I/O
64-57
P3
0
/RDY
I/O
40
P3
1
P3
2
P3
3
/DMAout
I/O
I/O
39
38
I/O
I/O
CMOS I/O port (DMAout). When the MCU is in memory expansion or microprocessor
mode, this pin is set to a “1” during a DMA transfer.
CMOS I/O port When the MCU is in memory expansion or microprocessor mode,
this pin becomes
Φ
out pin.
37
36
P3
4
/
Φ
out
P3
5
/SYNCout
I/O
CMOS I/O port (SYNCout). When the MCU is in memory expansion or
microprocessor mode, this pin becomes the SYNCout pin.
CMOS I/O port. (WR output). When the MCU is in memory expansion or microprocessor
mode, this pin becomes WR.
CMOS I/O port. (RD output). When the MCU is in memory expansion or microprocessor
mode, this pin becomes RD.
CMOS I/O port (EDMA: Expanded Data Memory Access). When the MCU is in memory
expansion or microprocessor mode, this pin can become the EDMA pin.
CMOS I/O port or external interrupt ports INT0 and INT1. These external interrupts can
be configured to be active high or low.
CMOS I/O port or Timer X input pin for pulse width measurement mode and event
counter mode or Timer X output pin for pulse output mode. This pin can also be used as
an external interrupt when Timer X is not in output mode. The interrupt polarity is
selected in the Timer X mode register.
CMOS I/O port or Timer Y input pin for pulse period measurement mode, pulse H-L
measurement mode and event counter mode or Timer Y output pin for pulse output
mode. This pin can also be used as an external interrupt when Timer Y is not in output
mode. The interrupt polarity is selected in the Timer Y mode register.
CMOS I/O port or XCin.
CMOS I/O port or Timer half pulse output pin (can be configured initially high or initially
low), or XCout.
CMOS I/O port or OBF
0
output to master CPU for data bus buffer 0.
CMOS I/O port or IBF
0
output to master CPU for data bus buffer 0.
CMOS I/O port or S
0
input from master CPU for data bus buffer 0.
CMOS I/O port or A
0
input from master CPU.
CMOS I/O port or R(E) input from master CPU.
CMOS I/O port or W(R/W) input from master CPU.
CMOS I/O port or master CPU data bus.
35
P3
6
/WR
I/O
34
P3
7
/RD
P4
0
/EDMA
I/O
I/O
33
24
P4
1
/INT0~ P4
2
/INT1
I/O
23-22
P4
3
/CNTR0
I/O
21
P4
4
/CNTR1
I/O
20
P5
0
/XCin
P5
1
/Tout/XCout
I/O
I/O
12
11
P5
2
/OBF
0
P5
3
/IBF
0
P5
4
/S
0
P5
5
/A
0
P5
6
/R(E)
P5
7
/W(R/W)
P6
0
/DQ0~ P6
7
/DQ7
I/O
I/O
I/O
I/O
I/O
I/O
I/O
8
7
6
5
4
3
2-1,
80-75
71
70
69
USB D-
USB D+
P7
0
/SOF
I/O
I/O
I/O
USB D- voltage line interface, a series resistor of 33
should be connected to this pin.
USB D+ voltage line interface, a series resistor of 33
should be connected to this pin.
CMOS I/O port or USB start of frame pulse output, an 80 ns pulse outputs on this pin for
every USB frame.
CMOS I/O port or HOLD pin.
P7
1
/HOLD
I/O
68
P7
2
/S
1
I/O
CMOS I/O port or S
1
input from master CPU for data bus buffer 1.
67
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