參數(shù)資料
型號(hào): M37630E4FP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, 10 MHz, MICROCONTROLLER, PQFP44
封裝: 0.80 MM PITCH, PLASTIC, QFP-44
文件頁(yè)數(shù): 9/48頁(yè)
文件大小: 563K
代理商: M37630E4FP
MITSUBISHI MICROCOMPUTERS
7630 Group
17
MITSUBISHI
ELECTRIC
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
Fig. 15
Structure of interrupt request and control registers A, B and C
7
Interrupt request register A
(address 000216)
IREQA
CAN wake up
interrupt request bit
Timer X interrupt request bit
Timer Y interrupt request bit
Timer 1 interrupt request bit
Timer 2 interrupt request bit
Timer 3 interrupt request bit
CNTR0 interrupt request bit
CNTR1 interrupt request bit
7
0
7
0
0 : No interrupt request
1 : Interrupt requested
0
Not used
(returns to ”0” when read)
External interrupt INT0 request bit
External interrupt INT1 request bit
CAN successful transmission
interrupt request bit
CAN successful receive
interrupt request bit
CAN overrun interrupt request bit
CAN error passive
interrupt request bit
CAN bus off interrupt request bit
Interrupt request register B
(address 000316)
IREQB
Interrupt request register C
(address 000416)
IREQC
UART receive complete
(receive buffer full)
interrupt request bit
UART transmit complete
(transmit register empty)
interrupt request bit
UART transmit buffer empty
interrupt request bit
UART receive error interrupt
request bit
Serial I/O interrupt request bit
AD conversion complete
interrupt request bit
Key-on wake-up interrupt request bit
Not used (returns to ”0” when read)
7
0
Not used (returns to ”0” when read)
External interrupt INT0 enable bit
External interrupt INT1 enable bit
CAN successful transmission
interrupt enable bit
CAN successful receive
interrupt enable bit
CAN overrun interrupt enable bit
CAN error passive
interrupt enable bit
CAN bus off interrupt enable bit
Interrupt control register A
(address 000516)
ICONA
7
0 Interrupt control register B
(address 000616)
ICONB
CAN wake–up interrupt enable bit
Timer X interrupt enable bit
Timer Y interrupt enable bit
Timer 1 interrupt enable bit
Timer 2 interrupt enable bit
Timer 3 interrupt enable bit
CNTR0 interrupt enable bit
CNTR1 interrupt enable bit
7
0
Interrupt control register C
(address 000716)
ICONC
UART receive complete
(receive buffer full)
interrupt enable bit
UART transmit complete
(transmit register empty)
interrupt enable bit
UART transmit buffer empty
interrupt enable bit
UART receive error interrupt
enable bit
Serial I/O interrupt enable bit
AD conversion complete
interrupt enable bit
Key-on wake-up interrupt enable bit
Not used (returns to ”0” when read)
0:
Interrupt disabled
1:
Interrupt enabled
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