參數(shù)資料
型號： M37560M8A-XXXGP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, MROM, 5 MHz, MICROCONTROLLER, PQFP100
封裝： 14 X 14 MM, 0.50 MM PITCH, PLASTIC, LQFP-100
文件頁數(shù)： 9/73頁
文件大?。?/td> 888K
代理商： M37560M8A-XXXGP
Rev.1.02
Jul 31, 2003
page 15 of 69
7560 Group (A version)
Fig. 13 Structure of PULL register A and PULL register B
Pull-up Control
By setting the PULL register A (address 001616) or the PULL reg-
ister B (address 001716), ports P0 to P2, P4 to P6 can control
pull-up with a program.
However, the contents of PULL register A and PULL register B do
not affect ports set to output mode and the ports are no pulled up.
The PULL register A setting is invalid for pins selecting segment
output with the segment output enable register and the pins are
not pulled up.
P00, P01 pull-up control bit
P02, P03 pull-up control bit
P04–P07 pull-up control bit
P10–P13 pull-up control bit
P14, P15 pull-up control bit
P16, P17 pull-up control bit
P20–P23 pull-up control bit
P24–P27 pull-up control bit
PULL register A
(PULLA : address 001616)
b7
b0
P41–P43 pull-up control bit
P44–P47 pull-up control bit
P50–P53 pull-up control bit
P54–P57 pull-up control bit
P60–P63 pull-up control bit
P64–P67 pull-up control bit
Not used “0” at reading)
0 : Disable
1 : Enable
PULL register B
(PULLB : address 001716)
b7
b0
Note: The contents of PULL register A and PULL register B
do not affect ports set to output mode.
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