參數(shù)資料









型號(hào)：
M37560M6-XXXGP




廠(chǎng)商：
Mitsubishi Electric Corporation




英文描述：
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER




中文描述：
單芯片8位CMOS微機(jī)




文件頁(yè)數(shù)：
41/65頁(yè)




文件大小：
955K




代理商：
M37560M6-XXXGP








	

    
    

    

	
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
7560 Group
41
                        (divider division ratio for LCD)
                  (frequency of count source for LCDCK)
                               duty ratio
                               f(LCDCK)
Fig. 42  LCD display RAM map
Common Pin and Duty Ratio Control
The common pins (COM
0
–
COM
3
) to be used are determined by
duty ratio.
Select duty ratio by the duty ratio selection bits (bits 0 and 1 of the
LCD mode register).
When releasing from reset, the V
CC
 (V
L3
) voltage is output from
the common pins.
LCD Display RAM
Address 0040
16
 to 0053
16
 is the designated RAM for the LCD dis-
play. When 
“
1
”
 are written to these addresses, the corresponding
segments of the LCD display panel are turned on.
LCD Drive Timing
The LCDCK timing frequency (LCD drive timing) is generated in-
ternally and the frame frequency can be determined with the fol-
lowing equation;
Table 11. Duty ratio control and common pins used
Duty
ratio
2
3
4
Common pins used
Notes 1: 
COM
2
 and COM
3
 are open.
2:
 COM
3
 is open.
Bit 1
0
1
1
Bit 0
1
0
1
COM
0
, COM
1 
(Note 1)
COM
0
–
COM
2 
COM
0
–
COM
3
Duty ratio selection bits
Segment Signal Output Pin
Segment signal output pins are classified into the segment-only
pins (SEG
0
–
SEG
17
), the segment/output port pins (SEG
18
–
SEG
25
), and the segment/I/O port pins (SEG
26
–
SEG
39
).
Segment signals are output according to the bit data of the LCD
RAM corresponding to the duty ratio. After reset release, a V
CC
(=V
L3
) voltage is output to the segment-only pins and the seg-
ment/output port pins are the high impedance condition and
pulled up to V
CC
 (=V
L3
) voltage.
Also, the segment/I/O port pins(SEG
26
–
SEG
39
) are set to input
ports, and V
CC
 (=V
L3
) is applied to them by pull-up resistor.
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
5
5
5
5
0
1
1
1
2
1
3
1
4
1
5
1
6
1
7
1
8
1
9
1
A
1
B
1
C
1
D
1
E
1
F
1
0
1
1
1
2
1
3
1
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
B
 i
t
Address
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
S
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
E
G
1
G
3
G
5
G
7
G
9
G
1
G
1
G
1
G
1
G
1
G
2
G
2
G
2
G
2
G
2
G
3
G
3
G
3
G
3
G
3
1
3
5
7
9
1
3
5
7
9
1
3
5
7
9
7
6
5
4
3
2
1
0
C
 O
M
3
C
 O
M
0
C
 O
M
2
 C
 O
M
1
 C
 O
M
0
 C
 O
M
3
 C
 O
M
2
 C
S
E
S
E
S
E
S
E
S
E
S
E
S
E
S
E
S
E
S
E
S
E
S
E
S
E
S
E
S
E
S
E
S
E
S
E
S
E
S
E
 O
G
0
G
2
G
4
G
6
G
8
G
1
G
1
G
1
G
1
G
1
G
2
G
2
G
2
G
2
G
2
G
3
G
3
G
3
G
3
G
3
M
1
0
2
4
6
8
0
2
4
6
8
0
2
4
6
8

    

    
    








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