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參數(shù)資料
| 型號： | M37546G2-XXXGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP32 |
| 封裝： | 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32 |
| 文件頁數(shù)： | 14/105頁 |
| 文件大?。?/td> | 1105K |
| 代理商： | M37546G2-XXXGP |
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REJ03B0160-0122 Rev.1.22 Mar 13, 2009
page 14 of 100
7546 Group
[CPU mode register] CPUM
The CPU mode register contains the stack page selection bit, etc..
This register is allocated at address 003B16.
Some function of the CPU mode register can be controlled by the
function set ROM data 2.
Fig. 12 Switching method of CPU mode register
Fig. 11 Structure of CPU mode register
Oscillation mode selection bit (Note 1, Note 4)
0 : Ceramic oscillation
1 : RC oscillation
CPU mode register (Note 1)
(CPUM: address 003B16, initial value: 8016)
Stack page selection bit
0 : 0 page
1 : 1 page
Clock division ratio selection bits
b7 b6
0
0 : f(φ) = f(XIN)/2 (High-speed mode)
0
1 : f(φ) = f(XIN)/8 (Middle-speed mode)
1
0 : applied from on-chip oscillator
1
1 : f(φ) = f(XIN)/1 (Double-speed mode)(Note 5)
On-chip oscillator oscillation control bit (Note 3)
0 : On-chip oscillator oscillation enabled
1 : On-chip oscillator oscillation stop
XIN oscillation control bit
0 : Ceramic or RC oscillation enabled
1 : Ceramic or RC oscillation stop
Processor mode bits
b1 b0
0
0 Single-chip mode
0
1 Not available
1
0 Not available
1
1 Not available
Note 1: When the setting by the function set ROM data 2 (FSROM2) is performed, the initial value of CPUM is changed
after releasing reset since bit 5 of CPUM is fixed.
2: The setting values of FSROM2 become valid by setting “0” to bit 0 of function set ROM data 0 (FSROM0).
The setting values of FSROM2 are invalid by setting “1” to this bit.
(In order that FSROM2 is invalid, write to CPUM after releasing reset.)
3: When bit 4 of FSROM2 is set to “0”, the operation of on-chip oscillator cannot be stopped.
Since the on-chip oscillator is not stopped also in the stop mode, the dissipation current in the stop mode is increased.
4: The setting value of bit 5 of CPUM can be fixed after releasing reset by setting value of bit 5 of FSROM2.
Also, when the setting of FSROM2 is invalid, this bit can be rewritten only once after releasing reset.
After rewriting it is disable to write any data to this bit.
This bit is initialized by reset, and then, rewriting it is enabled.
5: This setting can be used only at ceramic oscillation. Do not use this at RC oscillation.
b7
b0
Control by Function set ROM data 2
(FSROM2: address FFDA16) (Note 2)
This bit function can be set by setting bit 5 of FSROM2. (Note 4)
Bit 5 of FSROM2 = 0: Bit 5 of CPUM is fixed to “0”.
Bit 5 of FSROM2 = 1: Bit 5 of CPUM is “0” or “1”.
This cannot be controlled by FSROM2.
This bit function can be set by setting bit 4 of FSROM2. (Note 3)
Bit 4 of FSROM2 = 0: Bit 3 of CPUM is fixed to “0”.
Bit 4 of FSROM2 = 1: Bit 3 of CPUM is “0” or “1”.
This cannot be controlled by FSROM2.
After releasing reset
Switch the oscillation mode
selection bit (bit 5 of CPUM)
Switch the clock division ratio
selection bits (bits 6 and 7 of CPUM)
Main routine
Start with an on-chip oscillator
An initial value is set as a ceramic oscillation mode.
When it is switched to an RC oscillation, its oscillation starts.
Select 1/1, 1/2, 1/8 or on-chip oscillator.
Wait by on-chip oscillator operation
until establishment of oscillator clock
When using a ceramic oscillation, wait until establishment of
oscillation from oscillation starts.
When using an RC oscillation, wait time is not required
basically (time to execute the instruction to switch from an
on-chip oscillator meets the requirement).
Note: After system is released from reset, an on-chip oscillator turns active automatically and system operation
is started.
Switching method of CPU mode register
Switch the CPU mode register (CPUM) at the head of program af-
ter releasing Reset in the following method.
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| M37546G2GP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP32 |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M37546G2-XXXHP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37546G2-XXXSP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37546G4GP | 功能描述:MCU 2/5V 16K 32-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 標(biāo)準(zhǔn)包裝:250 系列:80C 核心處理器:8051 芯體尺寸:8-位 速度:16MHz 連通性:EBI/EMI，I²C，UART/USART 外圍設(shè)備:POR，PWM，WDT 輸入/輸出數(shù):40 程序存儲器容量:- 程序存儲器類型:ROMless EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-LCC（J 形引線） 包裝:帶卷 (TR) |
| M37546G4GP#U0 | 功能描述:MCU 2/5V 16K 32-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 標(biāo)準(zhǔn)包裝:250 系列:80C 核心處理器:8051 芯體尺寸:8-位 速度:16MHz 連通性:EBI/EMI，I²C，UART/USART 外圍設(shè)備:POR，PWM，WDT 輸入/輸出數(shù):40 程序存儲器容量:- 程序存儲器類型:ROMless EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-LCC（J 形引線） 包裝:帶卷 (TR) |
| M37546G4HP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
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