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參數(shù)資料
| 型號： | M37545GF-XXXGP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 4 MHz, MICROCONTROLLER, PQFP32 |
| 封裝： | 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32 |
| 文件頁數(shù)： | 58/65頁 |
| 文件大小： | 782K |
| 代理商： | M37545GF-XXXGP |
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Rev.1.07
Mar 19, 2009
Page 59 of 60
REJ03B0140-0107
7545 Group
Notes on Timers
1. When n (0 to 255) is written to a timer latch, the frequency
division ratio is 1/(n+1).
2. Timer count source
Stop timer 2, timer 3 counting to change its count source.
3. Timer 1, timer 2, timer 3 count start timing and count time
when operation starts
Time to first underflow is different from time among next
underflow by the timing to start the timer and count source
operations after count starts.
4. Timer 2, timer 3, carrier wave generating circuit
The timing adjustment of the output waveform causes the
gap between the timer count value and the output
waveform, and the output waveform changes in the reload
cycle after the timer underflow.
Moreover, the timer interrupt occurs at the change point of
the output waveform.
(The timing of the interrupt occurrence is behind a half
cycle of the count source, compared with timer 1.)
Notes on Watchdog Timer
1. The watchdog timer is operating during the wait mode.
Write data to the watchdog timer control register to prevent
timer underflow.
2. The watchdog timer stops during the stop mode. However,
the watchdog timer is running during the oscillation stabi-
lizing time after the STP instruction is released. In order to
avoid the underflow of the watchdog timer, the watchdog
timer H count source selection bit (bit 7 of watchdog timer
control register (address 3916)) must be set to “0” just
before executing the STP instruction.
Notes on RESET Pin
(1) Connecting capacitor
In case where the RESET signal rise time is long, connect a
ceramic capacitor or others across the RESET pin and the Vss
pin.
And use a 1000 pF or more capacitor for high frequency use.
When connecting the capacitor, note the following:
Make the length of the wiring which is connected to a
capacitor as short as possible.
Be sure to verify the operation of application products on the
user side.
<Reason>
If the several nanosecond or several ten nanosecond impulse
noise enters the RESET pin, it may cause a microcomputer
failure.
Notes on Power-on Reset Circuit
Reset occurs by the power-on reset circuit under the following
conditions;
when the power source voltage rises from 0 V to 1.8 V within
1 ms.
Also, note that reset may not occur under the following
conditions;
when the power source voltage rises from the voltage higher
than 0 V.
when it takes longer than 1 ms that the power source voltage
rises from 0 V to 1.8 V.
Note on Voltage Drop Detection Circuit
The voltage drop detection circuit detection voltage of this
product is set up lower than the minimum value of the supply
voltage of the recommended operating conditions.
When the supply voltage of a microcomputer falls below to the
minimum value of recommended operating conditions and
regoes up (ex. battery exchange of an application product),
depending on the capacity value of the bypass capacitor added to
the power supply pin, the following case may cause program
failure;
supply voltage does not fall below to VDET, and its voltage re-
goes up with no reset.
In such a case, please design a system which supply voltage is
once reduced below to VDET and re-goes up after that.
Fig 6.
VCC and VDET
Notes on Clock Generating Circuit
(1) CPU mode register
Processor mode bits (bits 1 and 0) of CPU mode register (address
3B16) is used to control operation modes of the microcomputer.
In order to prevent the dead-lock by erroneously writing (ex.
program run-away), these bits can be rewritten only once after
releasing reset.
After rewriting, it is disabled to write any data to the bit. (The
emulator MCU “M37545RLSS” is excluded.)
Also, when the read-modify-write instructions (SEB, CLB, etc.)
are executed to bits 2, 6, 7, bits 1 and 0 are locked.
(2) Ceramic resonator
When the ceramic resonator/quartz-crystal oscillation is used for
the main clock, connect the ceramic resonator and the external
circuit to pins XIN and XOUT at the shortest distance. A feedback
resistor is built-in.
Vcc
VDET
Reset
Normal operation
No reset
Program failure may occur.
Recommended
operating condition
min. value
Vcc
VDET
Recommended
operating condition
min. value
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| M37545RLSS | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER |
| M37546G2GP | 功能描述:MCU 2/5V 8K 32-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 標準包裝:250 系列:80C 核心處理器:8051 芯體尺寸:8-位 速度:16MHz 連通性:EBI/EMI，I²C，UART/USART 外圍設(shè)備:POR，PWM，WDT 輸入/輸出數(shù):40 程序存儲器容量:- 程序存儲器類型:ROMless EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-LCC（J 形引線） 包裝:帶卷 (TR) |
| M37546G2GP#U0 | 功能描述:MCU 2/5V 8K 32-LQFP QZ-ROM LEAD RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 標準包裝:250 系列:80C 核心處理器:8051 芯體尺寸:8-位 速度:16MHz 連通性:EBI/EMI，I²C，UART/USART 外圍設(shè)備:POR，PWM，WDT 輸入/輸出數(shù):40 程序存儲器容量:- 程序存儲器類型:ROMless EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-LCC（J 形引線） 包裝:帶卷 (TR) |
| M37546G2HP | 功能描述:MCU 2/5V 8K 36-HWQFN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 標準包裝:250 系列:80C 核心處理器:8051 芯體尺寸:8-位 速度:16MHz 連通性:EBI/EMI，I²C，UART/USART 外圍設(shè)備:POR，PWM，WDT 輸入/輸出數(shù):40 程序存儲器容量:- 程序存儲器類型:ROMless EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-LCC（J 形引線） 包裝:帶卷 (TR) |
| M37546G2HP#U0 | 功能描述:MCU 2/5V 8K 36-HWQFN QZ-ROM RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 標準包裝:250 系列:80C 核心處理器:8051 芯體尺寸:8-位 速度:16MHz 連通性:EBI/EMI，I²C，UART/USART 外圍設(shè)備:POR，PWM，WDT 輸入/輸出數(shù):40 程序存儲器容量:- 程序存儲器類型:ROMless EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-LCC（J 形引線） 包裝:帶卷 (TR) |
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