參數(shù)資料
型號(hào): M37542F8GP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP32
封裝: 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32
文件頁(yè)數(shù): 100/124頁(yè)
文件大?。?/td> 1238K
代理商: M37542F8GP
第1頁(yè)第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)第17頁(yè)第18頁(yè)第19頁(yè)第20頁(yè)第21頁(yè)第22頁(yè)第23頁(yè)第24頁(yè)第25頁(yè)第26頁(yè)第27頁(yè)第28頁(yè)第29頁(yè)第30頁(yè)第31頁(yè)第32頁(yè)第33頁(yè)第34頁(yè)第35頁(yè)第36頁(yè)第37頁(yè)第38頁(yè)第39頁(yè)第40頁(yè)第41頁(yè)第42頁(yè)第43頁(yè)第44頁(yè)第45頁(yè)第46頁(yè)第47頁(yè)第48頁(yè)第49頁(yè)第50頁(yè)第51頁(yè)第52頁(yè)第53頁(yè)第54頁(yè)第55頁(yè)第56頁(yè)第57頁(yè)第58頁(yè)第59頁(yè)第60頁(yè)第61頁(yè)第62頁(yè)第63頁(yè)第64頁(yè)第65頁(yè)第66頁(yè)第67頁(yè)第68頁(yè)第69頁(yè)第70頁(yè)第71頁(yè)第72頁(yè)第73頁(yè)第74頁(yè)第75頁(yè)第76頁(yè)第77頁(yè)第78頁(yè)第79頁(yè)第80頁(yè)第81頁(yè)第82頁(yè)第83頁(yè)第84頁(yè)第85頁(yè)第86頁(yè)第87頁(yè)第88頁(yè)第89頁(yè)第90頁(yè)第91頁(yè)第92頁(yè)第93頁(yè)第94頁(yè)第95頁(yè)第96頁(yè)第97頁(yè)第98頁(yè)第99頁(yè)當(dāng)前第100頁(yè)第101頁(yè)第102頁(yè)第103頁(yè)第104頁(yè)第105頁(yè)第106頁(yè)第107頁(yè)第108頁(yè)第109頁(yè)第110頁(yè)第111頁(yè)第112頁(yè)第113頁(yè)第114頁(yè)第115頁(yè)第116頁(yè)第117頁(yè)第118頁(yè)第119頁(yè)第120頁(yè)第121頁(yè)第122頁(yè)第123頁(yè)第124頁(yè)
7542 Group
Rev.3.03
Jul 11, 2008
Page 75 of 117
REJ03B0006-0303
Fig. 98 Structure of flash memory control register 0
b7
b0
Flash memory control register 0
(FMCR0: address : 0FE016: initial value: 0116)
RY/BY
status flag
0 : Busy (being written or erased)
1 : Ready
CPU rewrite mode select bit (Note 1)
0 :
CPU rewrite mode invalid
1 :
CPU rewrite mode valid
8KB user block E/W mode enable bit
(Note 1, 2)
0 : E/W disabled
1 : E/W enabled
Flash memory reset bit
(Note 3)
0 : Normal operation
1 : reset
Not used (do not write “1” to this bit.)
User ROM area select bit
(Note 4)
0 : Boot ROM area is accessed
1 : User ROM area is accessed
Program status flag
0: Pass
1: Error
Erase status flag
0: Pass
1: Error
Notes 1: For this bit to be set to “1”, the user needs to write a “0” and then a
“1” to it in succession. For this bit to be set to “0”, write “0” only to
this bit.
2: This bit can be written only when CPU rewrite mode select bit is “1”.
3: Effective only when the CPU rewrite mode select bit = “1”. Fix this
bit to “0” when the CPU rewrite mode select bit is “0”.
4: Write to this bit in program on RAM
[Flash memory control registers (FMCR0 to FMCR2)]
0FE016 to 0FE216
Figure 98 shows the flash memory control register 0.
Bit 0 of the flash memory control register 0 is the RY/BY status
flag used exclusively to read the operating status of the flash
memory. During programming and erase operations, it is “0”
(busy). Otherwise, it is “1” (ready).
Bit 1 of the flash memory control register 0 is the CPU rewrite
mode select bit. When this bit is set to “1”, the MCU enters CPU
rewrite mode. And then, software commands can be accepted. In
CPU rewrite mode, the CPU becomes unable to access the inter-
nal flash memory directly. Therefore, use the control program in
the internal RAM for write to bit 1. To set this bit 1 to “1”, it is nec-
essary to write “0” and then write “1” in succession to bit 1. The bit
can be set to “0” by only writing “0”.
Bit 2 of the flash memory control register 0 is the 8KB user block
E/W mode enable bit. By setting this bit in combination with bit 4
(all user block E/W enable bit) of flash memory control register 2
(address 0FE016), Erase/Write to user block in CPU rewrite mode
is disabled.
Bit 3 of the flash memory control register 0 is the flash memory re-
set bit used to reset the control circuit of internal flash memory.
This bit is used when exiting CPU rewrite mode and when flash
memory access has failed. When the CPU rewrite mode select bit
is “1”, setting “1” for this bit resets the control circuit. To release
the reset, it is necessary to set this bit to “0”.
Bit 5 of the flash memory control register 0 is the User ROM area
select bit and is valid only in the boot mode. Setting this bit to “1”
in the boot mode switches an accessible area from the boot ROM
area to the user ROM area. To use the CPU rewrite mode in the
boot mode, set this bit to “1”. Note that when the microcomputer is
booted up in the user ROM area, only the user ROM area is ac-
cessible and bit 5 is invalid; on the other hand, when the
microcomputer is in the boot mode, bit 5 is valid independent of
the CPU rewrite mode. To rewrite bit 5, execute the user-original
reprogramming control software transferred to the internal RAM in
advance.
Bit 6 of the flash memory control register 0 is the program status
flag. This bit is set to “1” when writing to flash memory is failed.
When program error occurs, the block cannot be used.
Bit 7 of the flash memory control register 0 is the erase status flag.
This bit is set to “1” when erasing flash memory is failed. When
erase error occurs, the block cannot be used.
相關(guān)PDF資料
PDF描述
M37542F4GP 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP32
M37542F4FP 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO36
M37542M4-XXXHP 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQCC36
M37542M2-XXXFP 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PDSO36
M37542M2-XXXHP 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQCC36
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
M37542F8GP#U0 功能描述:MCU 3/5V 32K+4K PB-FREE 32-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器, 系列:740/38000 標(biāo)準(zhǔn)包裝:250 系列:80C 核心處理器:8051 芯體尺寸:8-位 速度:16MHz 連通性:EBI/EMI,I²C,UART/USART 外圍設(shè)備:POR,PWM,WDT 輸入/輸出數(shù):40 程序存儲(chǔ)器容量:- 程序存儲(chǔ)器類型:ROMless EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4.5 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 85°C 封裝/外殼:68-LCC(J 形引線) 包裝:帶卷 (TR)
M37542F8GPSP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP MICROCOMPUTER
M37542F8HP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M37542F8SP 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
M37542F8SP#U0 制造商:Renesas Electronics Corporation 功能描述:MCU 4.0/5.5V 32K PB-FREE 32-SDIP - Trays