參數(shù)資料
型號: M37542F8FP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO36
封裝: 8.4 X 15 MM, 0.80 MM PITCH, PLASTIC, SSOP-36
文件頁數(shù): 66/124頁
文件大?。?/td> 1238K
代理商: M37542F8FP
7542 Group
Rev.3.03
Jul 11, 2008
Page 44 of 117
REJ03B0006-0303
Fig. 49 Structure of capture software trigger register
b7
b0
Capture register 0 (Low-order)
(CAP0L : address 000C16)
b7
b0
Capture register 0 (High-order)
(CAP0H : address 000D16)
b7
b0
Capture register 1 (Low-order)
(CAP1L : address 000E16)
b7
b0
Capture register 1 (High-order)
(CAP1H : address 000F16)
b7
b0
Capture 0 interrupt edge selection bits
b1 b0
00: Rising and falling edge
01: Rising edge
10: Falling edge
11: Not available
Capture 1 interrupt edge selection bits
b3 b2
00: Rising and falling edge
01: Rising edge
10: Falling edge
11: Not available
Capture 0 noise filter clock selection bits
b5 b4
00: Filter stop
01: f(XIN)
10: f(XIN)/8
11: f(XIN)/32
Capture 1 noise filter clock selection bits
b7 b6
00: Filter stop
01: f(XIN)
10: f(XIN)/8
11: f(XIN)/32
Capture mode register
(CAPM : address 002016, initial value: 0016)
b7
b0
Capture latch 00 software trigger bit
Capture latch 01 software trigger bit
Capture latch 10 software trigger bit
Capture latch 11 software trigger bit
Each software trigger occurs by setting “1” to
corresponding bit. (returns “0” when read)
Not used (returns “0” when read)
Capture software trigger register
(CSTR : address 001316, initial value: 0016)
Fig. 50 Structure of capture software trigger register/capture
mode register
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