參數(shù)資料
型號(hào)： M37542F4FP
元件分類： 微控制器/微處理器
英文描述： 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PDSO36
封裝： 8.4 X 15 MM, 0.80 MM PITCH, PLASTIC, SSOP-36
文件頁數(shù)： 51/124頁
文件大小： 1238K
代理商： M37542F4FP
7542 Group
Rev.3.03
Jul 11, 2008
Page 30 of 117
REJ03B0006-0303
Key Input Interrupt (Key-On Wake-Up)
A key-on wake-up interrupt request is generated by applying “L”
level to any pin of port P0 that has been set to input mode.
In other words, it is generated when the AND of input level goes
from “1” to “0”. An example of using a key input interrupt is shown
in Figure 28, where an interrupt request is generated by pressing
one of the keys provided as an active-low key matrix which uses
ports P00 to P03 as input ports.
Fig. 28 Connection example when using key input interrupt and port P0 block diagram
Port PXx
“L” level output
PULL register
bit 3 = “0”
Port P07
latch
Port P07
Direction register = “1”
**
*
P07 output
Key input interrupt request
Port P0
Input read circuit
* P-channel transistor for pull-up
** CMOS output buffer
PULL register
bit 3 = “0”
Port P06
latch
Port P06
Direction register = “1”
**
*
P06 output
PULL register
bit 3 = “0”
Port P05
latch
Port P05
Direction register = “1”
**
*
P05 output
PULL register
bit 3 = “0”
Port P04
latch
Port P04
Direction register = “1”
**
*
P04 output
PULL register
bit 2 = “1”
Port P03
latch
Port P03
Direction register = “0”
**
*
P03 input
PULL register
bit 2 = “1”
Port P02
latch
Port P02
Direction register = “0”
**
*
P02 input
PULL register
bit 1 = “1”
Port P01
latch
Port P01
Direction register = “0”
**
*
P01 input
PULL register
bit 0 = “1”
Port P00
latch
Port P00
Direction register = “0”
**
*
P00 input
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Falling edge
detection
Port P00 key-on wakeup
selection bit
Port P06 key-on wakeup
selection bit
Port P04 key-on wakeup
selection bit
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