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M37516M6-XXXHP
GNOK-M37516M6-XXXHP-50
(MSETSU  2)
PA
GE
Fig. 52  State transitions of system clock
CM
4 
: Port Xc switch bit
           0 : I/O port function (stop oscillating)
           1 : X
CIN
-X
COUT 
oscillating function
CM
5
 : Main clock (X
IN
- X
OUT
) stop bit
           0 : Oscillating
           1 : Stopped
CM
7
, CM
6
: Main clock division ratio selection bit      
          b7  b6
           0     0 :  
= 
f
(X
IN
)/2 ( High-speed mode)
           0     1 : 
= 
f
(X
IN
)/8 (Middle-speed mode)
           1     0 :  
= 
f
(X
CIN
)/2 (Low-speed mode)
           1     1 : Not available
Notes
Reset
C
4
“
“
CM
4
“0
CM
6
“1
“1
“0
CM
4
“1
“0
CM
6
“1
“0
C
7
“
“
C
4
“
“
C
5
“
“
CM
6
“1”
“0”
CM
6
“1”
“0”
CPU mode register
(CPUM : address 003B
16
) 
b7
b4
CM
7
“0
CM
6
“1
“1
“0
CM
7
=0
CM
6
=1
CM
5
=0(8 MHz oscillating)
CM
4
=0(32 kHz stopped)
Middle-speed mode 
(f(
)=1 MHz)
CM
7
=0
CM
6
=1
CM
5
=0(8 MHz oscillating)
CM
4
=1(32 kHz oscillating)
Middle-speed mode 
(f(
)=1 MHz)
CM
7
=0
CM
6
=0
CM
5
=0(8 MHz oscillating)
CM
4
=0(32 kHz stopped)
High-speed mode
 (f(
)=4 MHz)
CM
7
=1
CM
6
=0
CM
5
=0(8 MHz oscillating)
CM
4
=1(32 kHz oscillating)
Low-speed mode 
(f(
)=16 kHz)
CM
7
=1
CM
6
=0
CM
5
=1(8 MHz stopped)
CM
4
=1(32 kHz oscillating)
Low-speed mode 
(f(
)=16 kHz)
CM
7
=0
CM
6
=0
CM
5
=0(8 MHz oscillating)
CM
4
=1(32 kHz oscillating)
High-speed mode
 (f(
)=4 MHz)
1 : 
Switch the mode by the allows shown between the mode blocks. (Do not switch between the modes directly without an allow.)
2 : 
The all modes can be switched to the stop mode or the wait mode and return to the source mode when the stop mode or the wait mode is 
ended.
3 : 
Timer operates in the wait mode.
4 : 
When the stop mode is ended, a delay of approximately 1 ms occurs by connecting Timer 1 in middle/high-speed mode.
5 : 
When the stop mode is ended, the following is performed.
      (1) After the clock is restarted,  a delay of approximately 16ms occurs  in low-speed mode if Timer 12 count source selection bit is "0".
      (2) After the clock is restarted,  a delay of approximately 250ms occurs in low-speed mode if Timer 12 count source selection bit is "1". 
6 :
 Wait until oscillation stabilizes after oscillating the main clock X
IN
 before the switching from the low-speed mode to middle/high-speed 
mode.
7 : 
The example assumes that 8 MHz is being applied to the X
IN
 pin and 32 kHz to the X
CIN
 pin. f indicates the internal clock.